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[Alignment][NFC] Update Bitcodewriter to use Align 

Differential Revision: https://reviews.llvm.org/D83533
This commit is contained in:
Guillaume Chatelet 2020-07-27 08:16:28 +00:00
parent e1eacf27c6
commit d9bbe85943
3 changed files with 62 additions and 28 deletions
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30
llvm/include/llvm/Bitstream/BitcodeCommon.h Normal file
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@ -0,0 +1,30 @@
//===- BitcodeCommon.h - Common code for encode/decode --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header defines common code to be used by BitcodeWriter and
// BitcodeReader.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BITSTREAM_BITCODECOMMON_H
#define LLVM_BITSTREAM_BITCODECOMMON_H
#include "llvm/ADT/Bitfields.h"
namespace llvm {
struct AllocaPackedValues {
using Align = Bitfield::Element<unsigned, 0, 5>;
using UsedWithInAlloca = Bitfield::Element<bool, Align::NextBit, 1>;
using ExplicitType = Bitfield::Element<bool, UsedWithInAlloca::NextBit, 1>;
using SwiftError = Bitfield::Element<bool, ExplicitType::NextBit, 1>;
};
} // namespace llvm
#endif // LLVM_BITSTREAM_BITCODECOMMON_H

20
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
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@ -20,8 +20,9 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Triple.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Bitstream/BitstreamReader.h"
#include "llvm/Bitcode/LLVMBitCodes.h"
#include "llvm/Bitstream/BitcodeCommon.h"
#include "llvm/Bitstream/BitstreamReader.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Argument.h"
#include "llvm/IR/Attributes.h"
@ -4813,17 +4814,13 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
case bitc::FUNC_CODE_INST_ALLOCA: { // ALLOCA: [instty, opty, op, align]
if (Record.size() != 4)
return error("Invalid record");
uint64_t AlignRecord = Record[3];
const uint64_t InAllocaMask = uint64_t(1) << 5;
const uint64_t ExplicitTypeMask = uint64_t(1) << 6;
const uint64_t SwiftErrorMask = uint64_t(1) << 7;
const uint64_t FlagMask = InAllocaMask | ExplicitTypeMask |
SwiftErrorMask;
bool InAlloca = AlignRecord & InAllocaMask;
bool SwiftError = AlignRecord & SwiftErrorMask;
using APV = AllocaPackedValues;
const uint64_t Rec = Record[3];
const bool InAlloca = Bitfield::get<APV::UsedWithInAlloca>(Rec);
const bool SwiftError = Bitfield::get<APV::SwiftError>(Rec);
FullTy = getFullyStructuredTypeByID(Record[0]);
Type *Ty = flattenPointerTypes(FullTy);
if ((AlignRecord & ExplicitTypeMask) == 0) {
if (!Bitfield::get<APV::ExplicitType>(Rec)) {
auto *PTy = dyn_cast_or_null<PointerType>(Ty);
if (!PTy)
return error("Old-style alloca with a non-pointer type");
@ -4832,7 +4829,8 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
Type *OpTy = getTypeByID(Record[1]);
Value *Size = getFnValueByID(Record[2], OpTy);
MaybeAlign Align;
if (Error Err = parseAlignmentValue(AlignRecord & ~FlagMask, Align)) {
if (Error Err =
parseAlignmentValue(Bitfield::get<APV::Align>(Rec), Align)) {
return Err;
}
if (!Ty || !Size)

40
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
View File

@ -27,6 +27,7 @@
#include "llvm/Bitcode/BitcodeReader.h"
#include "llvm/Bitcode/LLVMBitCodes.h"
#include "llvm/Bitstream/BitCodes.h"
#include "llvm/Bitstream/BitcodeCommon.h"
#include "llvm/Bitstream/BitstreamWriter.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Attributes.h"
@ -394,6 +395,8 @@ private:
unsigned getEncodedSyncScopeID(SyncScope::ID SSID) {
return unsigned(SSID);
}
unsigned getEncodedAlign(MaybeAlign Alignment) { return encode(Alignment); }
};
/// Class to manage the bitcode writing for a combined index.
@ -1181,10 +1184,14 @@ void ModuleBitcodeWriter::writeModuleInfo() {
// compute the maximum alignment value.
std::map<std::string, unsigned> SectionMap;
std::map<std::string, unsigned> GCMap;
unsigned MaxAlignment = 0;
MaybeAlign MaxAlignment;
unsigned MaxGlobalType = 0;
const auto UpdateMaxAlignment = [&MaxAlignment](const MaybeAlign A) {
if (A)
MaxAlignment = !MaxAlignment ? *A : std::max(*MaxAlignment, *A);
};
for (const GlobalVariable &GV : M.globals()) {
MaxAlignment = std::max(MaxAlignment, GV.getAlignment());
UpdateMaxAlignment(GV.getAlign());
MaxGlobalType = std::max(MaxGlobalType, VE.getTypeID(GV.getValueType()));
if (GV.hasSection()) {
// Give section names unique ID's.
@ -1197,7 +1204,7 @@ void ModuleBitcodeWriter::writeModuleInfo() {
}
}
for (const Function &F : M) {
MaxAlignment = std::max(MaxAlignment, F.getAlignment());
UpdateMaxAlignment(F.getAlign());
if (F.hasSection()) {
// Give section names unique ID's.
unsigned &Entry = SectionMap[std::string(F.getSection())];
@ -1233,10 +1240,10 @@ void ModuleBitcodeWriter::writeModuleInfo() {
//| constant
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::VBR, 6)); // Initializer.
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed, 5)); // Linkage.
if (MaxAlignment == 0) // Alignment.
if (!MaxAlignment) // Alignment.
Abbv->Add(BitCodeAbbrevOp(0));
else {
unsigned MaxEncAlignment = Log2_32(MaxAlignment)+1;
unsigned MaxEncAlignment = getEncodedAlign(MaxAlignment);
Abbv->Add(BitCodeAbbrevOp(BitCodeAbbrevOp::Fixed,
Log2_32_Ceil(MaxEncAlignment+1)));
}
@ -1289,7 +1296,7 @@ void ModuleBitcodeWriter::writeModuleInfo() {
Vals.push_back(GV.isDeclaration() ? 0 :
(VE.getValueID(GV.getInitializer()) + 1));
Vals.push_back(getEncodedLinkage(GV));
Vals.push_back(Log2_32(GV.getAlignment())+1);
Vals.push_back(getEncodedAlign(GV.getAlign()));
Vals.push_back(GV.hasSection() ? SectionMap[std::string(GV.getSection())]
: 0);
if (GV.isThreadLocal() ||
@ -1335,7 +1342,7 @@ void ModuleBitcodeWriter::writeModuleInfo() {
Vals.push_back(F.isDeclaration());
Vals.push_back(getEncodedLinkage(F));
Vals.push_back(VE.getAttributeListID(F.getAttributes()));
Vals.push_back(Log2_32(F.getAlignment())+1);
Vals.push_back(getEncodedAlign(F.getAlign()));
Vals.push_back(F.hasSection() ? SectionMap[std::string(F.getSection())]
: 0);
Vals.push_back(getEncodedVisibility(F));
@ -2945,14 +2952,13 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
Vals.push_back(VE.getTypeID(AI.getAllocatedType()));
Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
Vals.push_back(VE.getValueID(I.getOperand(0))); // size.
unsigned AlignRecord = Log2_32(AI.getAlignment()) + 1;
assert(Log2_32(Value::MaximumAlignment) + 1 < 1 << 5 &&
"not enough bits for maximum alignment");
assert(AlignRecord < 1 << 5 && "alignment greater than 1 << 64");
AlignRecord |= AI.isUsedWithInAlloca() << 5;
AlignRecord |= 1 << 6;
AlignRecord |= AI.isSwiftError() << 7;
Vals.push_back(AlignRecord);
using APV = AllocaPackedValues;
unsigned Record = 0;
Bitfield::set<APV::Align>(Record, getEncodedAlign(AI.getAlign()));
Bitfield::set<APV::UsedWithInAlloca>(Record, AI.isUsedWithInAlloca());
Bitfield::set<APV::ExplicitType>(Record, true);
Bitfield::set<APV::SwiftError>(Record, AI.isSwiftError());
Vals.push_back(Record);
break;
}
@ -2966,7 +2972,7 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
AbbrevToUse = FUNCTION_INST_LOAD_ABBREV;
}
Vals.push_back(VE.getTypeID(I.getType()));
Vals.push_back(Log2_32(cast<LoadInst>(I).getAlignment())+1);
Vals.push_back(getEncodedAlign(cast<LoadInst>(I).getAlign()));
Vals.push_back(cast<LoadInst>(I).isVolatile());
if (cast<LoadInst>(I).isAtomic()) {
Vals.push_back(getEncodedOrdering(cast<LoadInst>(I).getOrdering()));
@ -2980,7 +2986,7 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
Code = bitc::FUNC_CODE_INST_STORE;
pushValueAndType(I.getOperand(1), InstID, Vals); // ptrty + ptr
pushValueAndType(I.getOperand(0), InstID, Vals); // valty + val
Vals.push_back(Log2_32(cast<StoreInst>(I).getAlignment())+1);
Vals.push_back(getEncodedAlign(cast<StoreInst>(I).getAlign()));
Vals.push_back(cast<StoreInst>(I).isVolatile());
if (cast<StoreInst>(I).isAtomic()) {
Vals.push_back(getEncodedOrdering(cast<StoreInst>(I).getOrdering()));