forked from OSchip/llvm-project
Add i386/x86_64 tests of the eh_frame augmentation code in the x86
insturction profiling. Add a test that verifies that we reject a 32-bit only instruction in 64-bit (long) mode. This wraps up all the testing I want to add for x86AssemblyInspectionEngine. llvm-svn: 283404
This commit is contained in:
Jason Molenda
parent
bb96df602e
commit
d99f947dd1
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@ -958,7 +958,7 @@ TEST_F(Testx86AssemblyInspectionEngine, TestPushRBP) {
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UnwindPlan::RowSP row_sp;
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uint8_t data[] = {
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0x55, // pushq $rbp
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0x55, // pushq %rbp
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0x90 // nop
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};
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@ -1583,7 +1583,7 @@ TEST_F(Testx86AssemblyInspectionEngine, TestSubESP) {
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std::unique_ptr<x86AssemblyInspectionEngine> engine32 = Geti386Inspector();
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uint8_t data1[] = {
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0x81, 0xec, 0x00, 0x01, 0x00, 0x00, // subq $0x100, $esp
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0x81, 0xec, 0x00, 0x01, 0x00, 0x00, // subl $0x100, %esp
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0x90 // nop
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};
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@ -2110,11 +2110,11 @@ TEST_F(Testx86AssemblyInspectionEngine, TestSpillRegToStackViaMOVi386) {
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std::unique_ptr<x86AssemblyInspectionEngine> engine32 = Geti386Inspector();
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uint8_t data[] = {
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0x55, // pushq %ebp
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0x89, 0xe5, // movq %esp, %ebp
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0x55, // pushl %ebp
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0x89, 0xe5, // movl %esp, %ebp
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0x89, 0x9d, 0xb0, 0xfe, 0xff, 0xff, // movl %ebx, -0x150(%ebp)
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0x89, 0x75, 0xe0, // movl %esi, -0x20(%ebp)
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0x90 // nop
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0x90 // nop
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};
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sample_range = AddressRange(0x1000, sizeof(data));
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@ -2135,3 +2135,206 @@ TEST_F(Testx86AssemblyInspectionEngine, TestSpillRegToStackViaMOVi386) {
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-40, regloc.GetOffset());
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestSimplex86_64Augmented) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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AddressRange sample_range;
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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std::unique_ptr<x86AssemblyInspectionEngine> engine64 = Getx86_64Inspector();
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uint8_t data[] = {
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0x55, // pushq %rbp
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0x48, 0x89, 0xe5, // movq %rsp, %rbp
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// x86AssemblyInspectionEngine::AugmentUnwindPlanFromCallSite
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// has a bug where it can't augment a function that is just
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// prologue+epilogue - it needs at least one other instruction
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// in between.
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0x90, // nop
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0x5d, // popq %rbp
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0xc3 // retq
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};
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sample_range = AddressRange(0x1000, sizeof(data));
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unwind_plan.SetSourceName("unit testing hand-created unwind plan");
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unwind_plan.SetPlanValidAddressRange(sample_range);
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unwind_plan.SetRegisterKind(eRegisterKindLLDB);
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row_sp.reset(new UnwindPlan::Row);
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// Describe offset 0
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row_sp->SetOffset(0);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_rsp, 8);
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regloc.SetAtCFAPlusOffset(-8);
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row_sp->SetRegisterInfo(k_rip, regloc);
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unwind_plan.AppendRow(row_sp);
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// Allocate a new Row, populate it with the existing Row contents.
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UnwindPlan::Row *new_row = new UnwindPlan::Row;
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*new_row = *row_sp.get();
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row_sp.reset(new_row);
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// Describe offset 1
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row_sp->SetOffset(1);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_rsp, 16);
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regloc.SetAtCFAPlusOffset(-16);
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row_sp->SetRegisterInfo(k_rbp, regloc);
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unwind_plan.AppendRow(row_sp);
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// Allocate a new Row, populate it with the existing Row contents.
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new_row = new UnwindPlan::Row;
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*new_row = *row_sp.get();
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row_sp.reset(new_row);
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// Describe offset 4
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row_sp->SetOffset(4);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_rbp, 16);
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unwind_plan.AppendRow(row_sp);
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RegisterContextSP reg_ctx_sp;
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EXPECT_TRUE(engine64->AugmentUnwindPlanFromCallSite(
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data, sizeof(data), sample_range, unwind_plan, reg_ctx_sp));
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row_sp = unwind_plan.GetRowForFunctionOffset(6);
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EXPECT_EQ(6, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
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EXPECT_EQ(8, row_sp->GetCFAValue().GetOffset());
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// x86AssemblyInspectionEngine::AugmentUnwindPlanFromCallSite
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// doesn't track register restores (pop'ing a reg value back from
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// the stack) - it was just written to make stepping work correctly.
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// Technically we should be able to do the following test, but it
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// won't work today - the unwind plan will still say that the caller's
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// rbp is on the stack.
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// EXPECT_FALSE(row_sp->GetRegisterInfo(k_rbp, regloc));
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestSimplei386ugmented) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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AddressRange sample_range;
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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std::unique_ptr<x86AssemblyInspectionEngine> engine32 = Geti386Inspector();
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uint8_t data[] = {
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0x55, // pushl %ebp
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0x89, 0xe5, // movl %esp, %ebp
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// x86AssemblyInspectionEngine::AugmentUnwindPlanFromCallSite
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// has a bug where it can't augment a function that is just
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// prologue+epilogue - it needs at least one other instruction
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// in between.
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0x90, // nop
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0x5d, // popl %ebp
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0xc3 // retl
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};
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sample_range = AddressRange(0x1000, sizeof(data));
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unwind_plan.SetSourceName("unit testing hand-created unwind plan");
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unwind_plan.SetPlanValidAddressRange(sample_range);
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unwind_plan.SetRegisterKind(eRegisterKindLLDB);
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row_sp.reset(new UnwindPlan::Row);
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// Describe offset 0
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row_sp->SetOffset(0);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_esp, 4);
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regloc.SetAtCFAPlusOffset(-4);
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row_sp->SetRegisterInfo(k_eip, regloc);
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unwind_plan.AppendRow(row_sp);
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// Allocate a new Row, populate it with the existing Row contents.
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UnwindPlan::Row *new_row = new UnwindPlan::Row;
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*new_row = *row_sp.get();
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row_sp.reset(new_row);
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// Describe offset 1
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row_sp->SetOffset(1);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_esp, 8);
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regloc.SetAtCFAPlusOffset(-8);
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row_sp->SetRegisterInfo(k_ebp, regloc);
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unwind_plan.AppendRow(row_sp);
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// Allocate a new Row, populate it with the existing Row contents.
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new_row = new UnwindPlan::Row;
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*new_row = *row_sp.get();
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row_sp.reset(new_row);
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// Describe offset 3
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row_sp->SetOffset(3);
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row_sp->GetCFAValue().SetIsRegisterPlusOffset(k_ebp, 8);
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unwind_plan.AppendRow(row_sp);
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RegisterContextSP reg_ctx_sp;
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EXPECT_TRUE(engine32->AugmentUnwindPlanFromCallSite(
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data, sizeof(data), sample_range, unwind_plan, reg_ctx_sp));
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row_sp = unwind_plan.GetRowForFunctionOffset(5);
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EXPECT_EQ(5, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
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EXPECT_EQ(4, row_sp->GetCFAValue().GetOffset());
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// x86AssemblyInspectionEngine::AugmentUnwindPlanFromCallSite
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// doesn't track register restores (pop'ing a reg value back from
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// the stack) - it was just written to make stepping work correctly.
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// Technically we should be able to do the following test, but it
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// won't work today - the unwind plan will still say that the caller's
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// ebp is on the stack.
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// EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebp, regloc));
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}
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// Check that the i386 disassembler disassembles past an opcode that
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// is only valid in 32-bit mode (non-long mode), and the x86_64 disassembler
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// stops
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// disassembling at that point (long-mode).
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TEST_F(Testx86AssemblyInspectionEngine, Test32BitOnlyInstruction) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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AddressRange sample_range;
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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std::unique_ptr<x86AssemblyInspectionEngine> engine32 = Geti386Inspector();
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std::unique_ptr<x86AssemblyInspectionEngine> engine64 = Getx86_64Inspector();
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uint8_t data[] = {
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0x43, // incl $ebx --- an invalid opcode in 64-bit mode
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0x55, // pushl %ebp
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0x90 // nop
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};
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sample_range = AddressRange(0x1000, sizeof(data));
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EXPECT_TRUE(engine32->GetNonCallSiteUnwindPlanFromAssembly(
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data, sizeof(data), sample_range, unwind_plan));
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row_sp = unwind_plan.GetRowForFunctionOffset(2);
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EXPECT_EQ(2, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
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EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
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EXPECT_EQ(8, row_sp->GetCFAValue().GetOffset());
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_ebp, regloc));
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-8, regloc.GetOffset());
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unwind_plan.Clear();
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EXPECT_TRUE(engine64->GetNonCallSiteUnwindPlanFromAssembly(
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data, sizeof(data), sample_range, unwind_plan));
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row_sp = unwind_plan.GetRowForFunctionOffset(2);
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EXPECT_EQ(0, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
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EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
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EXPECT_EQ(8, row_sp->GetCFAValue().GetOffset());
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_rbp, regloc));
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}
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