[Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front end

This patch corresponds to review:
http://reviews.llvm.org/D19684

It simply adds the handling for the option and the corresponding macros.

llvm-svn: 268951
This commit is contained in:
Nemanja Ivanovic 2016-05-09 18:58:02 +00:00
parent 6e29baf7f5
commit d99f21b0e6
3 changed files with 52 additions and 2 deletions

View File

@ -851,8 +851,9 @@ public:
ArchDefinePwr6x = 1 << 10,
ArchDefinePwr7 = 1 << 11,
ArchDefinePwr8 = 1 << 12,
ArchDefineA2 = 1 << 13,
ArchDefineA2q = 1 << 14
ArchDefinePwr9 = 1 << 13,
ArchDefineA2 = 1 << 14,
ArchDefineA2q = 1 << 15
} ArchDefineTypes;
// Note: GCC recognizes the following additional cpus:
@ -901,6 +902,8 @@ public:
.Case("pwr7", true)
.Case("power8", true)
.Case("pwr8", true)
.Case("power9", true)
.Case("pwr9", true)
.Case("powerpc", true)
.Case("ppc", true)
.Case("powerpc64", true)
@ -1195,6 +1198,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
.Case("pwr8", ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x
| ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
| ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
.Case("pwr9", ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7
| ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
| ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
| ArchDefinePpcsq)
.Case("power3", ArchDefinePpcgr)
.Case("power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
.Case("power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
@ -1212,6 +1219,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
.Case("power8", ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x
| ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5
| ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq)
.Case("power9", ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7
| ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x
| ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr
| ArchDefinePpcsq)
.Default(ArchDefineNone);
if (defs & ArchDefineName)
@ -1240,6 +1251,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("_ARCH_PWR7");
if (defs & ArchDefinePwr8)
Builder.defineMacro("_ARCH_PWR8");
if (defs & ArchDefinePwr9)
Builder.defineMacro("_ARCH_PWR9");
if (defs & ArchDefineA2)
Builder.defineMacro("_ARCH_A2");
if (defs & ArchDefineA2q) {
@ -1339,6 +1352,7 @@ bool PPCTargetInfo::initFeatureMap(
.Case("pwr6", true)
.Case("pwr7", true)
.Case("pwr8", true)
.Case("pwr9", true)
.Case("ppc64", true)
.Case("ppc64le", true)
.Default(false);
@ -1346,28 +1360,34 @@ bool PPCTargetInfo::initFeatureMap(
Features["qpx"] = (CPU == "a2q");
Features["crypto"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Default(false);
Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Default(false);
Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Case("pwr7", true)
.Default(false);
Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Case("pwr7", true)
.Default(false);
Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Default(false);
Features["vsx"] = llvm::StringSwitch<bool>(CPU)
.Case("ppc64le", true)
.Case("pwr9", true)
.Case("pwr8", true)
.Case("pwr7", true)
.Default(false);

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@ -1479,6 +1479,7 @@ static std::string getPPCTargetCPU(const ArgList &Args) {
.Case("power6x", "pwr6x")
.Case("power7", "pwr7")
.Case("power8", "pwr8")
.Case("power9", "pwr9")
.Case("pwr3", "pwr3")
.Case("pwr4", "pwr4")
.Case("pwr5", "pwr5")
@ -1487,6 +1488,7 @@ static std::string getPPCTargetCPU(const ArgList &Args) {
.Case("pwr6x", "pwr6x")
.Case("pwr7", "pwr7")
.Case("pwr8", "pwr8")
.Case("pwr9", "pwr9")
.Case("powerpc", "ppc")
.Case("powerpc64", "ppc64")
.Case("powerpc64le", "ppc64le")

View File

@ -5827,6 +5827,34 @@
// PPCPOWER8:#define _ARCH_PWR7 1
// PPCPOWER8:#define _ARCH_PWR8 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-cpu pwr9 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPCPWR9 %s
//
// PPCPWR9:#define _ARCH_PPC 1
// PPCPWR9:#define _ARCH_PPC64 1
// PPCPWR9:#define _ARCH_PPCGR 1
// PPCPWR9:#define _ARCH_PPCSQ 1
// PPCPWR9:#define _ARCH_PWR4 1
// PPCPWR9:#define _ARCH_PWR5 1
// PPCPWR9:#define _ARCH_PWR5X 1
// PPCPWR9:#define _ARCH_PWR6 1
// PPCPWR9:#define _ARCH_PWR6X 1
// PPCPWR9:#define _ARCH_PWR7 1
// PPCPWR9:#define _ARCH_PWR9 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-cpu power9 -fno-signed-char < /dev/null | FileCheck -match-full-lines -check-prefix PPCPOWER9 %s
//
// PPCPOWER9:#define _ARCH_PPC 1
// PPCPOWER9:#define _ARCH_PPC64 1
// PPCPOWER9:#define _ARCH_PPCGR 1
// PPCPOWER9:#define _ARCH_PPCSQ 1
// PPCPOWER9:#define _ARCH_PWR4 1
// PPCPOWER9:#define _ARCH_PWR5 1
// PPCPOWER9:#define _ARCH_PWR5X 1
// PPCPOWER9:#define _ARCH_PWR6 1
// PPCPOWER9:#define _ARCH_PWR6X 1
// PPCPOWER9:#define _ARCH_PWR7 1
// PPCPOWER9:#define _ARCH_PWR9 1
//
// RUN: %clang_cc1 -E -dM -ffreestanding -triple=powerpc64-none-none -target-feature +float128 -target-cpu power8 -fno-signed-char < /dev/null | FileCheck -check-prefix PPC-FLOAT128 %s
// PPC-FLOAT128:#define __FLOAT128__ 1
//