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Test commit. Comment changes. NFC. 

llvm-svn: 288100
This commit is contained in:
Warren Ristow 2016-11-29 02:37:13 +00:00
parent f9d34dfbe4
commit d9777c1dbb
1 changed files with 5 additions and 5 deletions
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10
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2376,8 +2376,8 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
return Op;
// sdiv, srem -> sdivrem
// If the divisor is constant, then return DIVREM only if isIntDivCheap() is true.
// Otherwise, we break the simplification logic in visitREM().
// If the divisor is constant, then return DIVREM only if isIntDivCheap() is
// true. Otherwise, we break the simplification logic in visitREM().
if (!N1C || TLI.isIntDivCheap(N->getValueType(0), Attr))
if (SDValue DivRem = useDivRem(N))
return DivRem;
@ -2441,8 +2441,8 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) {
return Op;
// sdiv, srem -> sdivrem
// If the divisor is constant, then return DIVREM only if isIntDivCheap() is true.
// Otherwise, we break the simplification logic in visitREM().
// If the divisor is constant, then return DIVREM only if isIntDivCheap() is
// true. Otherwise, we break the simplification logic in visitREM().
if (!N1C || TLI.isIntDivCheap(N->getValueType(0), Attr))
if (SDValue DivRem = useDivRem(N))
return DivRem;
@ -8885,7 +8885,7 @@ SDValue DAGCombiner::visitFMA(SDNode *N) {
// Combine multiple FDIVs with the same divisor into multiple FMULs by the
// reciprocal.
// E.g., (a / D; b / D;) -> (recip = 1.0 / D; a * recip; b * recip)
// Notice that this is not always beneficial. One reason is different target
// Notice that this is not always beneficial. One reason is different targets
// may have different costs for FDIV and FMUL, so sometimes the cost of two
// FDIVs may be lower than the cost of one FDIV and two FMULs. Another reason
// is the critical path is increased from "one FDIV" to "one FDIV + one FMUL".