forked from OSchip/llvm-project
parent
6f855e3024
commit
d966e723f7
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@ -2411,6 +2411,64 @@ PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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return false;
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}
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// PowerPC-64
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namespace {
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class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
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public:
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PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
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int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const {
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// This is recovered from gcc output.
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return 1; // r1 is the dedicated stack pointer
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}
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bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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llvm::Value *Address) const;
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};
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}
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bool
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PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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llvm::Value *Address) const {
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// This is calculated from the LLVM and GCC tables and verified
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// against gcc output. AFAIK all ABIs use the same encoding.
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CodeGen::CGBuilderTy &Builder = CGF.Builder;
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llvm::IntegerType *i8 = CGF.Int8Ty;
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llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
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llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
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llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
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// 0-31: r0-31, the 8-byte general-purpose registers
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AssignToArrayRange(Builder, Address, Eight8, 0, 31);
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// 32-63: fp0-31, the 8-byte floating-point registers
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AssignToArrayRange(Builder, Address, Eight8, 32, 63);
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// 64-76 are various 4-byte special-purpose registers:
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// 64: mq
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// 65: lr
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// 66: ctr
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// 67: ap
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// 68-75 cr0-7
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// 76: xer
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AssignToArrayRange(Builder, Address, Four8, 64, 76);
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// 77-108: v0-31, the 16-byte vector registers
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AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
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// 109: vrsave
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// 110: vscr
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// 111: spe_acc
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// 112: spefscr
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// 113: sfp
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AssignToArrayRange(Builder, Address, Four8, 109, 113);
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return false;
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}
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//===----------------------------------------------------------------------===//
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// ARM ABI Implementation
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@ -3634,6 +3692,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
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case llvm::Triple::ppc:
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return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
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case llvm::Triple::ppc64:
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return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types));
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case llvm::Triple::ptx32:
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case llvm::Triple::ptx64:
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