maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Remove TargetELFWriterInfo. 

All the credit goes to Jan Voung for noticing it was dead!

llvm-svn: 166902
This commit is contained in:
Rafael Espindola 2012-10-28 21:34:43 +00:00
parent 4cfc817a9a
commit d957cb2584
24 changed files with 2 additions and 846 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

121
llvm/include/llvm/Target/TargetELFWriterInfo.h
View File

@ -1,121 +0,0 @@
//===-- llvm/Target/TargetELFWriterInfo.h - ELF Writer Info -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the TargetELFWriterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_TARGETELFWRITERINFO_H
#define LLVM_TARGET_TARGETELFWRITERINFO_H
namespace llvm {
//===--------------------------------------------------------------------===//
// TargetELFWriterInfo
//===--------------------------------------------------------------------===//
class TargetELFWriterInfo {
protected:
// EMachine - This field is the target specific value to emit as the
// e_machine member of the ELF header.
unsigned short EMachine;
bool is64Bit, isLittleEndian;
public:
// Machine architectures
enum MachineType {
EM_NONE = 0, // No machine
EM_M32 = 1, // AT&T WE 32100
EM_SPARC = 2, // SPARC
EM_386 = 3, // Intel 386
EM_68K = 4, // Motorola 68000
EM_88K = 5, // Motorola 88000
EM_486 = 6, // Intel 486 (deprecated)
EM_860 = 7, // Intel 80860
EM_MIPS = 8, // MIPS R3000
EM_PPC = 20, // PowerPC
EM_ARM = 40, // ARM
EM_ALPHA = 41, // DEC Alpha
EM_SPARCV9 = 43, // SPARC V9
EM_X86_64 = 62, // AMD64
EM_HEXAGON = 164 // Qualcomm Hexagon
};
// ELF File classes
enum {
ELFCLASS32 = 1, // 32-bit object file
ELFCLASS64 = 2 // 64-bit object file
};
// ELF Endianess
enum {
ELFDATA2LSB = 1, // Little-endian object file
ELFDATA2MSB = 2 // Big-endian object file
};
explicit TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_);
virtual ~TargetELFWriterInfo();
unsigned short getEMachine() const { return EMachine; }
unsigned getEFlags() const { return 0; }
unsigned getEIClass() const { return is64Bit ? ELFCLASS64 : ELFCLASS32; }
unsigned getEIData() const {
return isLittleEndian ? ELFDATA2LSB : ELFDATA2MSB;
}
/// ELF Header and ELF Section Header Info
unsigned getHdrSize() const { return is64Bit ? 64 : 52; }
unsigned getSHdrSize() const { return is64Bit ? 64 : 40; }
/// Symbol Table Info
unsigned getSymTabEntrySize() const { return is64Bit ? 24 : 16; }
/// getPrefELFAlignment - Returns the preferred alignment for ELF. This
/// is used to align some sections.
unsigned getPrefELFAlignment() const { return is64Bit ? 8 : 4; }
/// getRelocationEntrySize - Entry size used in the relocation section
unsigned getRelocationEntrySize() const {
return is64Bit ? (hasRelocationAddend() ? 24 : 16)
: (hasRelocationAddend() ? 12 : 8);
}
/// getRelocationType - Returns the target specific ELF Relocation type.
/// 'MachineRelTy' contains the object code independent relocation type
virtual unsigned getRelocationType(unsigned MachineRelTy) const = 0;
/// hasRelocationAddend - True if the target uses an addend in the
/// ELF relocation entry.
virtual bool hasRelocationAddend() const = 0;
/// getDefaultAddendForRelTy - Gets the default addend value for a
/// relocation entry based on the target ELF relocation type.
virtual long int getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier = 0) const = 0;
/// getRelTySize - Returns the size of relocatable field in bits
virtual unsigned getRelocationTySize(unsigned RelTy) const = 0;
/// isPCRelativeRel - True if the relocation type is pc relative
virtual bool isPCRelativeRel(unsigned RelTy) const = 0;
/// getJumpTableRelocationTy - Returns the machine relocation type used
/// to reference a jumptable.
virtual unsigned getAbsoluteLabelMachineRelTy() const = 0;
/// computeRelocation - Some relocatable fields could be relocated
/// directly, avoiding the relocation symbol emission, compute the
/// final relocation value for this symbol.
virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
unsigned RelTy) const = 0;
};
} // end llvm namespace
#endif // LLVM_TARGET_TARGETELFWRITERINFO_H

6
llvm/include/llvm/Target/TargetMachine.h
View File

@ -34,7 +34,6 @@ class MCContext;
class PassManagerBase;
class Target;
class DataLayout;
class TargetELFWriterInfo;
class TargetFrameLowering;
class TargetInstrInfo;
class TargetIntrinsicInfo;
@ -148,11 +147,6 @@ public:
return 0;
}
/// getELFWriterInfo - If this target supports an ELF writer, return
/// information for it, otherwise return null.
///
virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
/// hasMCRelaxAll - Check whether all machine code instructions should be
/// relaxed.
bool hasMCRelaxAll() const { return MCRelaxAll; }

78
llvm/lib/Target/ARM/ARMELFWriterInfo.cpp
View File

@ -1,78 +0,0 @@
//===-- ARMELFWriterInfo.cpp - ELF Writer Info for the ARM backend --------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the ARM backend.
//
//===----------------------------------------------------------------------===//
#include "ARMELFWriterInfo.h"
#include "ARMRelocations.h"
#include "llvm/Function.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/ELF.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// Implementation of the ARMELFWriterInfo class
//===----------------------------------------------------------------------===//
ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
: TargetELFWriterInfo(TM.getDataLayout()->getPointerSizeInBits(0) == 64,
TM.getDataLayout()->isLittleEndian()) {
}
ARMELFWriterInfo::~ARMELFWriterInfo() {}
unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
switch (MachineRelTy) {
case ARM::reloc_arm_absolute:
case ARM::reloc_arm_relative:
case ARM::reloc_arm_cp_entry:
case ARM::reloc_arm_vfp_cp_entry:
case ARM::reloc_arm_machine_cp_entry:
case ARM::reloc_arm_jt_base:
case ARM::reloc_arm_pic_jt:
llvm_unreachable("unsupported ARM relocation type");
case ARM::reloc_arm_branch: return ELF::R_ARM_CALL;
case ARM::reloc_arm_movt: return ELF::R_ARM_MOVT_ABS;
case ARM::reloc_arm_movw: return ELF::R_ARM_MOVW_ABS_NC;
default:
llvm_unreachable("unknown ARM relocation type");
}
}
long int ARMELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier) const {
llvm_unreachable("ARMELFWriterInfo::getDefaultAddendForRelTy() not "
"implemented");
}
unsigned ARMELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
llvm_unreachable("ARMELFWriterInfo::getRelocationTySize() not implemented");
}
bool ARMELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
llvm_unreachable("ARMELFWriterInfo::isPCRelativeRel() not implemented");
}
unsigned ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
llvm_unreachable("ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not "
"implemented");
}
long int ARMELFWriterInfo::computeRelocation(unsigned SymOffset,
unsigned RelOffset,
unsigned RelTy) const {
llvm_unreachable("ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not "
"implemented");
}

59
llvm/lib/Target/ARM/ARMELFWriterInfo.h
View File

@ -1,59 +0,0 @@
//===-- ARMELFWriterInfo.h - ELF Writer Info for ARM ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the ARM backend.
//
//===----------------------------------------------------------------------===//
#ifndef ARM_ELF_WRITER_INFO_H
#define ARM_ELF_WRITER_INFO_H
#include "llvm/Target/TargetELFWriterInfo.h"
namespace llvm {
class TargetMachine;
class ARMELFWriterInfo : public TargetELFWriterInfo {
public:
ARMELFWriterInfo(TargetMachine &TM);
virtual ~ARMELFWriterInfo();
/// getRelocationType - Returns the target specific ELF Relocation type.
/// 'MachineRelTy' contains the object code independent relocation type
virtual unsigned getRelocationType(unsigned MachineRelTy) const;
/// hasRelocationAddend - True if the target uses an addend in the
/// ELF relocation entry.
virtual bool hasRelocationAddend() const { return false; }
/// getDefaultAddendForRelTy - Gets the default addend value for a
/// relocation entry based on the target ELF relocation type.
virtual long int getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier = 0) const;
/// getRelTySize - Returns the size of relocatable field in bits
virtual unsigned getRelocationTySize(unsigned RelTy) const;
/// isPCRelativeRel - True if the relocation type is pc relative
virtual bool isPCRelativeRel(unsigned RelTy) const;
/// getJumpTableRelocationTy - Returns the machine relocation type used
/// to reference a jumptable.
virtual unsigned getAbsoluteLabelMachineRelTy() const;
/// computeRelocation - Some relocatable fields could be relocated
/// directly, avoiding the relocation symbol emission, compute the
/// final relocation value for this symbol.
virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
unsigned RelTy) const;
};
} // end llvm namespace
#endif // ARM_ELF_WRITER_INFO_H

2
llvm/lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -68,7 +68,6 @@ ARMTargetMachine::ARMTargetMachine(const Target &T, StringRef TT,
"v128:64:128-v64:64:64-n32-S64") :
std::string("e-p:32:32-f64:64:64-i64:64:64-"
"v128:64:128-v64:64:64-n32-S32")),
ELFWriterInfo(*this),
TLInfo(*this),
TSInfo(*this),
FrameLowering(Subtarget),
@ -100,7 +99,6 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, StringRef TT,
std::string("e-p:32:32-f64:64:64-i64:64:64-"
"i16:16:32-i8:8:32-i1:8:32-"
"v128:64:128-v64:64:64-a:0:32-n32-S32")),
ELFWriterInfo(*this),
TLInfo(*this),
TSInfo(*this),
FrameLowering(Subtarget.hasThumb2()

9
llvm/lib/Target/ARM/ARMTargetMachine.h
View File

@ -15,7 +15,6 @@
#define ARMTARGETMACHINE_H
#include "ARMInstrInfo.h"
#include "ARMELFWriterInfo.h"
#include "ARMFrameLowering.h"
#include "ARMJITInfo.h"
#include "ARMSubtarget.h"
@ -64,7 +63,6 @@ class ARMTargetMachine : public ARMBaseTargetMachine {
virtual void anchor();
ARMInstrInfo InstrInfo;
const DataLayout DL; // Calculates type size & alignment
ARMELFWriterInfo ELFWriterInfo;
ARMTargetLowering TLInfo;
ARMSelectionDAGInfo TSInfo;
ARMFrameLowering FrameLowering;
@ -99,9 +97,6 @@ class ARMTargetMachine : public ARMBaseTargetMachine {
}
virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const DataLayout *getDataLayout() const { return &DL; }
virtual const ARMELFWriterInfo *getELFWriterInfo() const {
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
}
};
/// ThumbTargetMachine - Thumb target machine.
@ -113,7 +108,6 @@ class ThumbTargetMachine : public ARMBaseTargetMachine {
// Either Thumb1InstrInfo or Thumb2InstrInfo.
OwningPtr<ARMBaseInstrInfo> InstrInfo;
const DataLayout DL; // Calculates type size & alignment
ARMELFWriterInfo ELFWriterInfo;
ARMTargetLowering TLInfo;
ARMSelectionDAGInfo TSInfo;
// Either Thumb1FrameLowering or ARMFrameLowering.
@ -155,9 +149,6 @@ public:
return &VTTI;
}
virtual const DataLayout *getDataLayout() const { return &DL; }
virtual const ARMELFWriterInfo *getELFWriterInfo() const {
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
}
};
} // end namespace llvm

1
llvm/lib/Target/ARM/CMakeLists.txt
View File

@ -22,7 +22,6 @@ add_llvm_target(ARMCodeGen
ARMCodeEmitter.cpp
ARMConstantIslandPass.cpp
ARMConstantPoolValue.cpp
ARMELFWriterInfo.cpp
ARMExpandPseudoInsts.cpp
ARMFastISel.cpp
ARMFrameLowering.cpp

1
llvm/lib/Target/CMakeLists.txt
View File

@ -1,7 +1,6 @@
add_llvm_library(LLVMTarget
Mangler.cpp
Target.cpp
TargetELFWriterInfo.cpp
TargetInstrInfo.cpp
TargetIntrinsicInfo.cpp
TargetJITInfo.cpp

1
llvm/lib/Target/MBlaze/CMakeLists.txt
View File

@ -27,7 +27,6 @@ add_llvm_target(MBlazeCodeGen
MBlazeSelectionDAGInfo.cpp
MBlazeAsmPrinter.cpp
MBlazeMCInstLower.cpp
MBlazeELFWriterInfo.cpp
)
add_dependencies(LLVMMBlazeCodeGen intrinsics_gen)

107
llvm/lib/Target/MBlaze/MBlazeELFWriterInfo.cpp
View File

@ -1,107 +0,0 @@
//===-- MBlazeELFWriterInfo.cpp - ELF Writer Info for the MBlaze backend --===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the MBlaze backend.
//
//===----------------------------------------------------------------------===//
#include "MBlazeELFWriterInfo.h"
#include "MBlazeRelocations.h"
#include "llvm/Function.h"
#include "llvm/Support/ELF.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// Implementation of the MBlazeELFWriterInfo class
//===----------------------------------------------------------------------===//
MBlazeELFWriterInfo::MBlazeELFWriterInfo(TargetMachine &TM)
: TargetELFWriterInfo(TM.getDataLayout()->getPointerSizeInBits(0) == 64,
TM.getDataLayout()->isLittleEndian()) {
}
MBlazeELFWriterInfo::~MBlazeELFWriterInfo() {}
unsigned MBlazeELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
switch (MachineRelTy) {
case MBlaze::reloc_pcrel_word:
return ELF::R_MICROBLAZE_64_PCREL;
case MBlaze::reloc_absolute_word:
return ELF::R_MICROBLAZE_NONE;
default:
llvm_unreachable("unknown mblaze machine relocation type");
}
}
long int MBlazeELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier) const {
switch (RelTy) {
case ELF::R_MICROBLAZE_32_PCREL:
return Modifier - 4;
case ELF::R_MICROBLAZE_32:
return Modifier;
default:
llvm_unreachable("unknown mblaze relocation type");
}
}
unsigned MBlazeELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
// FIXME: Most of these sizes are guesses based on the name
switch (RelTy) {
case ELF::R_MICROBLAZE_32:
case ELF::R_MICROBLAZE_32_PCREL:
case ELF::R_MICROBLAZE_32_PCREL_LO:
case ELF::R_MICROBLAZE_32_LO:
case ELF::R_MICROBLAZE_SRO32:
case ELF::R_MICROBLAZE_SRW32:
case ELF::R_MICROBLAZE_32_SYM_OP_SYM:
case ELF::R_MICROBLAZE_GOTOFF_32:
return 32;
case ELF::R_MICROBLAZE_64_PCREL:
case ELF::R_MICROBLAZE_64:
case ELF::R_MICROBLAZE_GOTPC_64:
case ELF::R_MICROBLAZE_GOT_64:
case ELF::R_MICROBLAZE_PLT_64:
case ELF::R_MICROBLAZE_GOTOFF_64:
return 64;
}
return 0;
}
bool MBlazeELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
// FIXME: Most of these are guesses based on the name
switch (RelTy) {
case ELF::R_MICROBLAZE_32_PCREL:
case ELF::R_MICROBLAZE_64_PCREL:
case ELF::R_MICROBLAZE_32_PCREL_LO:
case ELF::R_MICROBLAZE_GOTPC_64:
return true;
}
return false;
}
unsigned MBlazeELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
return MBlaze::reloc_absolute_word;
}
long int MBlazeELFWriterInfo::computeRelocation(unsigned SymOffset,
unsigned RelOffset,
unsigned RelTy) const {
assert((RelTy == ELF::R_MICROBLAZE_32_PCREL ||
RelTy == ELF::R_MICROBLAZE_64_PCREL) &&
"computeRelocation unknown for this relocation type");
return SymOffset - (RelOffset + 4);
}

59
llvm/lib/Target/MBlaze/MBlazeELFWriterInfo.h
View File

@ -1,59 +0,0 @@
//===-- MBlazeELFWriterInfo.h - ELF Writer Info for MBlaze ------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the MBlaze backend.
//
//===----------------------------------------------------------------------===//
#ifndef MBLAZE_ELF_WRITER_INFO_H
#define MBLAZE_ELF_WRITER_INFO_H
#include "llvm/Target/TargetELFWriterInfo.h"
namespace llvm {
class TargetMachine;
class MBlazeELFWriterInfo : public TargetELFWriterInfo {
public:
MBlazeELFWriterInfo(TargetMachine &TM);
virtual ~MBlazeELFWriterInfo();
/// getRelocationType - Returns the target specific ELF Relocation type.
/// 'MachineRelTy' contains the object code independent relocation type
virtual unsigned getRelocationType(unsigned MachineRelTy) const;
/// hasRelocationAddend - True if the target uses an addend in the
/// ELF relocation entry.
virtual bool hasRelocationAddend() const { return false; }
/// getDefaultAddendForRelTy - Gets the default addend value for a
/// relocation entry based on the target ELF relocation type.
virtual long int getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier = 0) const;
/// getRelTySize - Returns the size of relocatable field in bits
virtual unsigned getRelocationTySize(unsigned RelTy) const;
/// isPCRelativeRel - True if the relocation type is pc relative
virtual bool isPCRelativeRel(unsigned RelTy) const;
/// getJumpTableRelocationTy - Returns the machine relocation type used
/// to reference a jumptable.
virtual unsigned getAbsoluteLabelMachineRelTy() const;
/// computeRelocation - Some relocatable fields could be relocated
/// directly, avoiding the relocation symbol emission, compute the
/// final relocation value for this symbol.
virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
unsigned RelTy) const;
};
} // end llvm namespace
#endif // MBLAZE_ELF_WRITER_INFO_H

2
llvm/lib/Target/MBlaze/MBlazeTargetMachine.cpp
View File

@ -41,7 +41,7 @@ MBlazeTargetMachine(const Target &T, StringRef TT,
DL("E-p:32:32:32-i8:8:8-i16:16:16"),
InstrInfo(*this),
FrameLowering(Subtarget),
TLInfo(*this), TSInfo(*this), ELFWriterInfo(*this),
TLInfo(*this), TSInfo(*this),
InstrItins(Subtarget.getInstrItineraryData()),
STTI(&TLInfo), VTTI(&TLInfo) {
}

5
llvm/lib/Target/MBlaze/MBlazeTargetMachine.h
View File

@ -20,7 +20,6 @@
#include "MBlazeSelectionDAGInfo.h"
#include "MBlazeIntrinsicInfo.h"
#include "MBlazeFrameLowering.h"
#include "MBlazeELFWriterInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/DataLayout.h"
@ -38,7 +37,6 @@ namespace llvm {
MBlazeTargetLowering TLInfo;
MBlazeSelectionDAGInfo TSInfo;
MBlazeIntrinsicInfo IntrinsicInfo;
MBlazeELFWriterInfo ELFWriterInfo;
InstrItineraryData InstrItins;
ScalarTargetTransformImpl STTI;
VectorTargetTransformImpl VTTI;
@ -77,9 +75,6 @@ namespace llvm {
const TargetIntrinsicInfo *getIntrinsicInfo() const
{ return &IntrinsicInfo; }
virtual const MBlazeELFWriterInfo *getELFWriterInfo() const {
return &ELFWriterInfo;
}
virtual const ScalarTargetTransformInfo *getScalarTargetTransformInfo()const
{ return &STTI; }
virtual const VectorTargetTransformInfo *getVectorTargetTransformInfo()const

1
llvm/lib/Target/Mips/CMakeLists.txt
View File

@ -22,7 +22,6 @@ add_llvm_target(MipsCodeGen
MipsAsmPrinter.cpp
MipsCodeEmitter.cpp
MipsDelaySlotFiller.cpp
MipsELFWriterInfo.cpp
MipsJITInfo.cpp
MipsInstrInfo.cpp
MipsISelDAGToDAG.cpp

92
llvm/lib/Target/Mips/MipsELFWriterInfo.cpp
View File

@ -1,92 +0,0 @@
//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend ------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the Mips backend.
//
//===----------------------------------------------------------------------===//
#include "MipsELFWriterInfo.h"
#include "MipsRelocations.h"
#include "llvm/Function.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/ELF.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// Implementation of the MipsELFWriterInfo class
//===----------------------------------------------------------------------===//
MipsELFWriterInfo::MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
: TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
EMachine = EM_MIPS;
}
MipsELFWriterInfo::~MipsELFWriterInfo() {}
unsigned MipsELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
switch(MachineRelTy) {
case Mips::reloc_mips_pc16:
return ELF::R_MIPS_GOT16;
case Mips::reloc_mips_hi:
return ELF::R_MIPS_HI16;
case Mips::reloc_mips_lo:
return ELF::R_MIPS_LO16;
case Mips::reloc_mips_26:
return ELF::R_MIPS_26;
default:
llvm_unreachable("unknown Mips machine relocation type");
}
}
long int MipsELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier) const {
switch(RelTy) {
case ELF::R_MIPS_26: return Modifier;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
unsigned MipsELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
switch(RelTy) {
case ELF::R_MIPS_GOT16:
case ELF::R_MIPS_26:
return 32;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
bool MipsELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
switch(RelTy) {
case ELF::R_MIPS_GOT16:
return true;
case ELF::R_MIPS_26:
return false;
default:
llvm_unreachable("unknown Mips relocation type");
}
}
unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
return Mips::reloc_mips_26;
}
long int MipsELFWriterInfo::computeRelocation(unsigned SymOffset,
unsigned RelOffset,
unsigned RelTy) const {
if (RelTy == ELF::R_MIPS_GOT16)
return SymOffset - (RelOffset + 4);
llvm_unreachable("computeRelocation unknown for this relocation type");
}

59
llvm/lib/Target/Mips/MipsELFWriterInfo.h
View File

@ -1,59 +0,0 @@
//===-- MipsELFWriterInfo.h - ELF Writer Info for Mips ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the Mips backend.
//
//===----------------------------------------------------------------------===//
#ifndef MIPS_ELF_WRITER_INFO_H
#define MIPS_ELF_WRITER_INFO_H
#include "llvm/Target/TargetELFWriterInfo.h"
namespace llvm {
class MipsELFWriterInfo : public TargetELFWriterInfo {
public:
MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_);
virtual ~MipsELFWriterInfo();
/// getRelocationType - Returns the target specific ELF Relocation type.
/// 'MachineRelTy' contains the object code independent relocation type
virtual unsigned getRelocationType(unsigned MachineRelTy) const;
/// hasRelocationAddend - True if the target uses an addend in the
/// ELF relocation entry.
virtual bool hasRelocationAddend() const { return is64Bit ? true : false; }
/// getDefaultAddendForRelTy - Gets the default addend value for a
/// relocation entry based on the target ELF relocation type.
virtual long int getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier = 0) const;
/// getRelTySize - Returns the size of relocatable field in bits
virtual unsigned getRelocationTySize(unsigned RelTy) const;
/// isPCRelativeRel - True if the relocation type is pc relative
virtual bool isPCRelativeRel(unsigned RelTy) const;
/// getJumpTableRelocationTy - Returns the machine relocation type used
/// to reference a jumptable.
virtual unsigned getAbsoluteLabelMachineRelTy() const;
/// computeRelocation - Some relocatable fields could be relocated
/// directly, avoiding the relocation symbol emission, compute the
/// final relocation value for this symbol.
virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
unsigned RelTy) const;
};
} // end llvm namespace
#endif // MIPS_ELF_WRITER_INFO_H

2
llvm/lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -53,7 +53,7 @@ MipsTargetMachine(const Target &T, StringRef TT,
InstrInfo(MipsInstrInfo::create(*this)),
FrameLowering(MipsFrameLowering::create(*this, Subtarget)),
TLInfo(*this), TSInfo(*this), JITInfo(),
ELFWriterInfo(false, isLittle), STTI(&TLInfo), VTTI(&TLInfo) {
STTI(&TLInfo), VTTI(&TLInfo) {
}
void MipsebTargetMachine::anchor() { }

5
llvm/lib/Target/Mips/MipsTargetMachine.h
View File

@ -20,7 +20,6 @@
#include "MipsJITInfo.h"
#include "MipsSelectionDAGInfo.h"
#include "MipsSubtarget.h"
#include "MipsELFWriterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetFrameLowering.h"
@ -38,7 +37,6 @@ class MipsTargetMachine : public LLVMTargetMachine {
MipsTargetLowering TLInfo;
MipsSelectionDAGInfo TSInfo;
MipsJITInfo JITInfo;
MipsELFWriterInfo ELFWriterInfo;
ScalarTargetTransformImpl STTI;
VectorTargetTransformImpl VTTI;
@ -74,9 +72,6 @@ public:
return &TSInfo;
}
virtual const MipsELFWriterInfo *getELFWriterInfo() const {
return &ELFWriterInfo;
}
virtual const ScalarTargetTransformInfo *getScalarTargetTransformInfo()const {
return &STTI;
}

25
llvm/lib/Target/TargetELFWriterInfo.cpp
View File

@ -1,25 +0,0 @@
//===-- lib/Target/TargetELFWriterInfo.cpp - ELF Writer Info --0-*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the TargetELFWriterInfo class.
//
//===----------------------------------------------------------------------===//
#include "llvm/Function.h"
#include "llvm/Target/TargetELFWriterInfo.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
TargetELFWriterInfo::TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_) :
is64Bit(is64Bit_), isLittleEndian(isLittleEndian_) {
}
TargetELFWriterInfo::~TargetELFWriterInfo() {}

1
llvm/lib/Target/X86/CMakeLists.txt
View File

@ -17,7 +17,6 @@ set(sources
X86AsmPrinter.cpp
X86COFFMachineModuleInfo.cpp
X86CodeEmitter.cpp
X86ELFWriterInfo.cpp
X86FastISel.cpp
X86FloatingPoint.cpp
X86FrameLowering.cpp

147
llvm/lib/Target/X86/X86ELFWriterInfo.cpp
View File

@ -1,147 +0,0 @@
//===-- X86ELFWriterInfo.cpp - ELF Writer Info for the X86 backend --------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the X86 backend.
//
//===----------------------------------------------------------------------===//
#include "X86ELFWriterInfo.h"
#include "X86Relocations.h"
#include "llvm/Function.h"
#include "llvm/Support/ELF.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
// Implementation of the X86ELFWriterInfo class
//===----------------------------------------------------------------------===//
X86ELFWriterInfo::X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_)
: TargetELFWriterInfo(is64Bit_, isLittleEndian_) {
EMachine = is64Bit ? EM_X86_64 : EM_386;
}
X86ELFWriterInfo::~X86ELFWriterInfo() {}
unsigned X86ELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
if (is64Bit) {
switch(MachineRelTy) {
case X86::reloc_pcrel_word:
return ELF::R_X86_64_PC32;
case X86::reloc_absolute_word:
return ELF::R_X86_64_32;
case X86::reloc_absolute_word_sext:
return ELF::R_X86_64_32S;
case X86::reloc_absolute_dword:
return ELF::R_X86_64_64;
case X86::reloc_picrel_word:
default:
llvm_unreachable("unknown x86_64 machine relocation type");
}
} else {
switch(MachineRelTy) {
case X86::reloc_pcrel_word:
return ELF::R_386_PC32;
case X86::reloc_absolute_word:
return ELF::R_386_32;
case X86::reloc_absolute_word_sext:
case X86::reloc_absolute_dword:
case X86::reloc_picrel_word:
default:
llvm_unreachable("unknown x86 machine relocation type");
}
}
}
long int X86ELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier) const {
if (is64Bit) {
switch(RelTy) {
case ELF::R_X86_64_PC32: return Modifier - 4;
case ELF::R_X86_64_32:
case ELF::R_X86_64_32S:
case ELF::R_X86_64_64:
return Modifier;
default:
llvm_unreachable("unknown x86_64 relocation type");
}
} else {
switch(RelTy) {
case ELF::R_386_PC32: return Modifier - 4;
case ELF::R_386_32: return Modifier;
default:
llvm_unreachable("unknown x86 relocation type");
}
}
}
unsigned X86ELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
if (is64Bit) {
switch(RelTy) {
case ELF::R_X86_64_PC32:
case ELF::R_X86_64_32:
case ELF::R_X86_64_32S:
return 32;
case ELF::R_X86_64_64:
return 64;
default:
llvm_unreachable("unknown x86_64 relocation type");
}
} else {
switch(RelTy) {
case ELF::R_386_PC32:
case ELF::R_386_32:
return 32;
default:
llvm_unreachable("unknown x86 relocation type");
}
}
}
bool X86ELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
if (is64Bit) {
switch(RelTy) {
case ELF::R_X86_64_PC32:
return true;
case ELF::R_X86_64_32:
case ELF::R_X86_64_32S:
case ELF::R_X86_64_64:
return false;
default:
llvm_unreachable("unknown x86_64 relocation type");
}
} else {
switch(RelTy) {
case ELF::R_386_PC32:
return true;
case ELF::R_386_32:
return false;
default:
llvm_unreachable("unknown x86 relocation type");
}
}
}
unsigned X86ELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
return is64Bit ?
X86::reloc_absolute_dword : X86::reloc_absolute_word;
}
long int X86ELFWriterInfo::computeRelocation(unsigned SymOffset,
unsigned RelOffset,
unsigned RelTy) const {
if (RelTy == ELF::R_X86_64_PC32 || RelTy == ELF::R_386_PC32)
return SymOffset - (RelOffset + 4);
llvm_unreachable("computeRelocation unknown for this relocation type");
}

59
llvm/lib/Target/X86/X86ELFWriterInfo.h
View File

@ -1,59 +0,0 @@
//===-- X86ELFWriterInfo.h - ELF Writer Info for X86 ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements ELF writer information for the X86 backend.
//
//===----------------------------------------------------------------------===//
#ifndef X86_ELF_WRITER_INFO_H
#define X86_ELF_WRITER_INFO_H
#include "llvm/Target/TargetELFWriterInfo.h"
namespace llvm {
class X86ELFWriterInfo : public TargetELFWriterInfo {
public:
X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_);
virtual ~X86ELFWriterInfo();
/// getRelocationType - Returns the target specific ELF Relocation type.
/// 'MachineRelTy' contains the object code independent relocation type
virtual unsigned getRelocationType(unsigned MachineRelTy) const;
/// hasRelocationAddend - True if the target uses an addend in the
/// ELF relocation entry.
virtual bool hasRelocationAddend() const { return is64Bit ? true : false; }
/// getDefaultAddendForRelTy - Gets the default addend value for a
/// relocation entry based on the target ELF relocation type.
virtual long int getDefaultAddendForRelTy(unsigned RelTy,
long int Modifier = 0) const;
/// getRelTySize - Returns the size of relocatable field in bits
virtual unsigned getRelocationTySize(unsigned RelTy) const;
/// isPCRelativeRel - True if the relocation type is pc relative
virtual bool isPCRelativeRel(unsigned RelTy) const;
/// getJumpTableRelocationTy - Returns the machine relocation type used
/// to reference a jumptable.
virtual unsigned getAbsoluteLabelMachineRelTy() const;
/// computeRelocation - Some relocatable fields could be relocated
/// directly, avoiding the relocation symbol emission, compute the
/// final relocation value for this symbol.
virtual long int computeRelocation(unsigned SymOffset, unsigned RelOffset,
unsigned RelTy) const;
};
} // end llvm namespace
#endif // X86_ELF_WRITER_INFO_H

1
llvm/lib/Target/X86/X86TargetMachine.cpp
View File

@ -80,7 +80,6 @@ X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT,
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, Options.StackAlignmentOverride, is64Bit),
FrameLowering(*this, Subtarget),
ELFWriterInfo(is64Bit, true),
InstrItins(Subtarget.getInstrItineraryData()){
// Determine the PICStyle based on the target selected.
if (getRelocationModel() == Reloc::Static) {

5
llvm/lib/Target/X86/X86TargetMachine.h
View File

@ -15,7 +15,6 @@
#define X86TARGETMACHINE_H
#include "X86.h"
#include "X86ELFWriterInfo.h"
#include "X86InstrInfo.h"
#include "X86ISelLowering.h"
#include "X86FrameLowering.h"
@ -34,7 +33,6 @@ class StringRef;
class X86TargetMachine : public LLVMTargetMachine {
X86Subtarget Subtarget;
X86FrameLowering FrameLowering;
X86ELFWriterInfo ELFWriterInfo;
InstrItineraryData InstrItins;
public:
@ -63,9 +61,6 @@ public:
virtual const X86RegisterInfo *getRegisterInfo() const {
return &getInstrInfo()->getRegisterInfo();
}
virtual const X86ELFWriterInfo *getELFWriterInfo() const {
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
}
virtual const InstrItineraryData *getInstrItineraryData() const {
return &InstrItins;
}