diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 596fcbba470f..4fdeeac28553 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1930,6 +1930,11 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
     }
   }
 
+  bool FillDelaySlot =
+      MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder();
+  if (FillDelaySlot)
+    getTargetStreamer().emitDirectiveSetNoReorder();
+
   MacroExpanderResultTy ExpandResult =
       tryExpandInstruction(Inst, IDLoc, Out, STI);
   switch (ExpandResult) {
@@ -1944,8 +1949,10 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
 
   // If this instruction has a delay slot and .set reorder is active,
   // emit a NOP after it.
-  if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder())
+  if (FillDelaySlot) {
     createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Out, STI);
+    getTargetStreamer().emitDirectiveSetReorder();
+  }
 
   if ((Inst.getOpcode() == Mips::JalOneReg ||
        Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) &&
diff --git a/llvm/test/MC/Mips/double-expand.s b/llvm/test/MC/Mips/double-expand.s
new file mode 100644
index 000000000000..1c7c6a30721f
--- /dev/null
+++ b/llvm/test/MC/Mips/double-expand.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | FileCheck %s
+# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | \
+# RUN:     llvm-mc -triple=mipsel-unknown-linux | FileCheck %s
+
+# CHECK: bnez $2, foo
+# CHECK: nop
+# CHECK-NOT: nop
+
+        .text
+	bnez $2, foo