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[mips][ias] Prevent double-filling of delay slots by generating '.set noreorder' regions. 

Summary:
When clang is given -save-temps or -via-file-asm, any inline assembly in
the source is parsed twice. Once by the compiler, and again by the
assembler. We must take care to ensure that this doesn't lead to
double-filling delay slots.

Reviewers: sdardis, vkalintiris

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19166

llvm-svn: 266608
This commit is contained in:
Daniel Sanders 2016-04-18 12:35:36 +00:00
parent 5bf59728e2
commit d8c07766f3
2 changed files with 18 additions and 1 deletions
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9
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -1930,6 +1930,11 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
}
}
bool FillDelaySlot =
MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder();
if (FillDelaySlot)
getTargetStreamer().emitDirectiveSetNoReorder();
MacroExpanderResultTy ExpandResult =
tryExpandInstruction(Inst, IDLoc, Out, STI);
switch (ExpandResult) {
@ -1944,8 +1949,10 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
// If this instruction has a delay slot and .set reorder is active,
// emit a NOP after it.
if (MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder())
if (FillDelaySlot) {
createNop(hasShortDelaySlot(Inst.getOpcode()), IDLoc, Out, STI);
getTargetStreamer().emitDirectiveSetReorder();
}
if ((Inst.getOpcode() == Mips::JalOneReg ||
Inst.getOpcode() == Mips::JalTwoReg || ExpandedJalSym) &&

10
llvm/test/MC/Mips/double-expand.s Normal file
View File

@ -0,0 +1,10 @@
# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | FileCheck %s
# RUN: llvm-mc -triple=mipsel-unknown-linux < %s | \
# RUN: llvm-mc -triple=mipsel-unknown-linux | FileCheck %s
# CHECK: bnez $2, foo
# CHECK: nop
# CHECK-NOT: nop
.text
bnez $2, foo