forked from OSchip/llvm-project
[GlobalISel][X86] Support G_LOAD/G_STORE i1.
Summary: Support G_LOAD/G_STORE i1. Reviewers: zvi, guyblank Reviewed By: guyblank Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D35178 llvm-svn: 307527
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@ -69,6 +69,7 @@ void X86LegalizerInfo::setLegalizerInfo32bit() {
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for (auto Ty : {s8, s16, s32, p0})
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setAction({MemOp, Ty}, Legal);
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setAction({MemOp, s1}, WidenScalar);
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// And everything's fine in addrspace 0.
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setAction({MemOp, 1, p0}, Legal);
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}
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@ -128,6 +129,7 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
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for (auto Ty : {s8, s16, s32, s64, p0})
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setAction({MemOp, Ty}, Legal);
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setAction({MemOp, s1}, WidenScalar);
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// And everything's fine in addrspace 0.
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setAction({MemOp, 1, p0}, Legal);
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}
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@ -26,11 +26,18 @@ registers:
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- { id: 6, class: _, preferred-register: '' }
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- { id: 7, class: _, preferred-register: '' }
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- { id: 8, class: _, preferred-register: '' }
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- { id: 9, class: _, preferred-register: '' }
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- { id: 10, class: _, preferred-register: '' }
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# ALL: %0(p0) = IMPLICIT_DEF
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# ALL-NEXT: %11(s8) = G_LOAD %0(p0) :: (load 1)
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# ALL-NEXT: %9(s1) = G_TRUNC %11(s8)
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# ALL-NEXT: %1(s8) = G_LOAD %0(p0) :: (load 1)
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# ALL-NEXT: %2(s16) = G_LOAD %0(p0) :: (load 2)
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# ALL-NEXT: %3(s32) = G_LOAD %0(p0) :: (load 4)
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# ALL-NEXT: %4(p0) = G_LOAD %0(p0) :: (load 8)
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# ALL-NEXT: %10(s1) = IMPLICIT_DEF
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# ALL-NEXT: %12(s8) = G_ZEXT %10(s1)
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# ALL-NEXT: G_STORE %12(s8), %0(p0) :: (store 1)
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# ALL-NEXT: %5(s8) = IMPLICIT_DEF
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# ALL-NEXT: G_STORE %5(s8), %0(p0) :: (store 1)
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# ALL-NEXT: %6(s16) = IMPLICIT_DEF
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@ -44,11 +51,14 @@ body: |
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liveins: %rdi
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%0(p0) = IMPLICIT_DEF
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%9(s1) = G_LOAD %0(p0) :: (load 1)
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%1(s8) = G_LOAD %0(p0) :: (load 1)
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%2(s16) = G_LOAD %0(p0) :: (load 2)
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%3(s32) = G_LOAD %0(p0) :: (load 4)
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%4(p0) = G_LOAD %0(p0) :: (load 8)
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%10(s1) = IMPLICIT_DEF
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G_STORE %10, %0 :: (store 1)
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%5(s8) = IMPLICIT_DEF
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G_STORE %5, %0 :: (store 1)
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%6(s16) = IMPLICIT_DEF
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@ -4,6 +4,16 @@
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;TODO merge with x86-64 tests (many operations not suppored yet)
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define i1 @test_load_i1(i1 * %p1) {
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; ALL-LABEL: test_load_i1:
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; ALL: # BB#0:
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; ALL-NEXT: movl 4(%esp), %eax
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; ALL-NEXT: movb (%eax), %al
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; ALL-NEXT: retl
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%r = load i1, i1* %p1
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ret i1 %r
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}
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define i8 @test_load_i8(i8 * %p1) {
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; ALL-LABEL: test_load_i8:
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; ALL: # BB#0:
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@ -34,6 +44,18 @@ define i32 @test_load_i32(i32 * %p1) {
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ret i32 %r
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}
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define i1 * @test_store_i1(i1 %val, i1 * %p1) {
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; ALL-LABEL: test_store_i1:
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; ALL: # BB#0:
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; ALL-NEXT: movb 4(%esp), %cl
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; ALL-NEXT: movl 8(%esp), %eax
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; ALL-NEXT: andb $1, %cl
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; ALL-NEXT: movb %cl, (%eax)
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; ALL-NEXT: retl
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store i1 %val, i1* %p1
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ret i1 * %p1;
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}
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define i8 * @test_store_i8(i8 %val, i8 * %p1) {
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; ALL-LABEL: test_store_i8:
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; ALL: # BB#0:
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@ -2,6 +2,15 @@
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; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_FAST
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; RUN: llc -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_GREEDY
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define i1 @test_load_i1(i1 * %p1) {
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; ALL-LABEL: test_load_i1:
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; ALL: # BB#0:
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; ALL-NEXT: movb (%rdi), %al
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; ALL-NEXT: retq
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%r = load i1, i1* %p1
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ret i1 %r
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}
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define i8 @test_load_i8(i8 * %p1) {
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; ALL-LABEL: test_load_i8:
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; ALL: # BB#0:
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@ -70,6 +79,17 @@ define double @test_load_double(double * %p1) {
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ret double %r
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}
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define i1 * @test_store_i1(i1 %val, i1 * %p1) {
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; ALL-LABEL: test_store_i1:
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; ALL: # BB#0:
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; ALL-NEXT: andb $1, %dil
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; ALL-NEXT: movb %dil, (%rsi)
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; ALL-NEXT: movq %rsi, %rax
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; ALL-NEXT: retq
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store i1 %val, i1* %p1
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ret i1 * %p1;
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}
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define i32 * @test_store_i32(i32 %val, i32 * %p1) {
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; ALL-LABEL: test_store_i32:
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; ALL: # BB#0:
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