forked from OSchip/llvm-project
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commit
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@ -57,7 +57,11 @@ namespace CallingConv {
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/// X86_FastCall - 'fast' analog of X86_StdCall. Passes first two arguments
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/// X86_FastCall - 'fast' analog of X86_StdCall. Passes first two arguments
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/// in ECX:EDX registers, others - via stack. Callee is responsible for
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/// in ECX:EDX registers, others - via stack. Callee is responsible for
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/// stack cleaning.
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/// stack cleaning.
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X86_FastCall = 65
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X86_FastCall = 65,
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/// X86_SSEreg - The standard convention except that float and double
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/// values are returned in XMM0 if SSE support is available.
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X86_SSECall = 66
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};
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};
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} // End CallingConv namespace
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} // End CallingConv namespace
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@ -61,6 +61,15 @@ def RetCC_X86_32_Fast : CallingConv<[
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CCDelegateTo<RetCC_X86Common>
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CCDelegateTo<RetCC_X86Common>
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]>;
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]>;
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// X86-32 SSEregparm return-value convention.
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def RetCC_X86_32_SSE : CallingConv<[
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// The X86-32 sseregparm calling convention returns FP values in XMM0 if the
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// target has SSE2, otherwise it is the C calling convention.
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CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
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CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
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CCDelegateTo<RetCC_X86Common>
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]>;
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// X86-64 C return-value convention.
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// X86-64 C return-value convention.
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def RetCC_X86_64_C : CallingConv<[
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def RetCC_X86_64_C : CallingConv<[
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// The X86-64 calling convention always returns FP values in XMM0.
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// The X86-64 calling convention always returns FP values in XMM0.
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@ -69,12 +78,12 @@ def RetCC_X86_64_C : CallingConv<[
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CCDelegateTo<RetCC_X86Common>
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CCDelegateTo<RetCC_X86Common>
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]>;
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]>;
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// This is the root return-value convention for the X86-32 backend.
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// This is the root return-value convention for the X86-32 backend.
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def RetCC_X86_32 : CallingConv<[
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def RetCC_X86_32 : CallingConv<[
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// If FastCC, use RetCC_X86_32_Fast.
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// If FastCC, use RetCC_X86_32_Fast.
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CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
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CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
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// If SSECC, use RetCC_X86_32_SSE.
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CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
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// Otherwise, use RetCC_X86_32_C.
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// Otherwise, use RetCC_X86_32_C.
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CCDelegateTo<RetCC_X86_32_C>
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CCDelegateTo<RetCC_X86_32_C>
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]>;
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]>;
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@ -179,6 +188,11 @@ def CC_X86_32_Common : CallingConv<[
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// Handles byval parameters.
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// Handles byval parameters.
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CCIfByVal<CCPassByVal<4, 4>>,
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CCIfByVal<CCPassByVal<4, 4>>,
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// The first 3 float or double arguments, if marked 'inreg' and if the call
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// is not a vararg call and if SSE2 is available, are passed in SSE registers.
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CCIfNotVarArg<CCIfInReg<CCIfType<[f32,f64], CCIfSubtarget<"hasSSE2()",
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CCAssignToReg<[XMM0,XMM1,XMM2]>>>>>,
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// Integer/Float values get stored in stack slots that are 4 bytes in
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// Integer/Float values get stored in stack slots that are 4 bytes in
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// size and 4-byte aligned.
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// size and 4-byte aligned.
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CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
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CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
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@ -1137,9 +1137,9 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
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RC = X86::GR32RegisterClass;
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RC = X86::GR32RegisterClass;
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else if (Is64Bit && RegVT == MVT::i64)
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else if (Is64Bit && RegVT == MVT::i64)
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RC = X86::GR64RegisterClass;
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RC = X86::GR64RegisterClass;
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else if (Is64Bit && RegVT == MVT::f32)
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else if (RegVT == MVT::f32)
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RC = X86::FR32RegisterClass;
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RC = X86::FR32RegisterClass;
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else if (Is64Bit && RegVT == MVT::f64)
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else if (RegVT == MVT::f64)
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RC = X86::FR64RegisterClass;
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RC = X86::FR64RegisterClass;
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else {
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else {
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assert(MVT::isVector(RegVT));
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assert(MVT::isVector(RegVT));
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