forked from OSchip/llvm-project
[X86][SSE] Minor regression fix for r225551
r225551 vector byte shuffle optimization caused an assertion as fully zeroable vectors can be produced under certain circumstances. This fix drops the assert and returns a zero vector where the assert would have failed. llvm-svn: 225718
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@ -9652,7 +9652,6 @@ static SDValue lowerV16I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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V2InUse |= (ZeroMask != V2Idx);
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}
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}
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assert((V1InUse || V2InUse) && "Shuffling to a zeroable vector");
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if (V1InUse)
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V1 = DAG.getNode(X86ISD::PSHUFB, DL, MVT::v16i8, V1,
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@ -9668,6 +9667,8 @@ static SDValue lowerV16I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
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return V1; // Single inputs are easy.
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if (V2InUse)
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return V2; // Single inputs are easy.
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// Shuffling to a zeroable vector.
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return getZeroVector(MVT::v16i8, Subtarget, DAG, DL);
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}
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// There are special ways we can lower some single-element blends.
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