forked from OSchip/llvm-project
Add some more immediate patterns. This allows us to compile:
void test6() { Y = 0xABCD0123BCDE4567; } into: _test6: lis r2, -21555 lis r3, ha16(_Y) ori r2, r2, 291 rldicr r2, r2, 32, 31 oris r2, r2, 48350 ori r2, r2, 17767 std r2, lo16(_Y)(r3) blr llvm-svn: 28885
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@ -215,6 +215,17 @@ def FCTIDZ : XForm_26<63, 815, (ops F8RC:$frD, F8RC:$frB),
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// Instruction Patterns
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// Instruction Patterns
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//
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//
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def HI32_48 : SDNodeXForm<imm, [{
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// Transformation function: shift the immediate value down into the low bits.
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return getI32Imm((unsigned short)(N->getValue() >> 32));
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}]>;
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def HI48_64 : SDNodeXForm<imm, [{
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// Transformation function: shift the immediate value down into the low bits.
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return getI32Imm((unsigned short)(N->getValue() >> 48));
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}]>;
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// Immediate support.
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// Immediate support.
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// Handled above:
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// Handled above:
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// sext(0x0000_0000_0000_FFFF, i8) -> li imm
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// sext(0x0000_0000_0000_FFFF, i8) -> li imm
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@ -234,6 +245,25 @@ def zext_0x0000_0000_FFFF_7FFF_i16 : PatLeaf<(imm), [{
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def : Pat<(i64 zext_0x0000_0000_FFFF_7FFF_i16:$imm),
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def : Pat<(i64 zext_0x0000_0000_FFFF_7FFF_i16:$imm),
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(ORIS8 (LI8 (LO16 imm:$imm)), (HI16 imm:$imm))>;
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(ORIS8 (LI8 (LO16 imm:$imm)), (HI16 imm:$imm))>;
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// zext(0x0000_0000_FFFF_FFFF, i16) -> oris (ori (li 0), lo16(imm)), imm>>16
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def zext_0x0000_0000_FFFF_FFFF_i16 : PatLeaf<(imm), [{
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return (N->getValue() & 0xFFFFFFFF00000000ULL) == 0;
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}]>;
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def : Pat<(i64 zext_0x0000_0000_FFFF_FFFF_i16:$imm),
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(ORIS8 (ORI8 (LI8 0), (LO16 imm:$imm)), (HI16 imm:$imm))>;
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// Fully general (and most expensive: 6 instructions!) immediate pattern.
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def : Pat<(i64 imm:$imm),
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(ORI8
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(ORIS8
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(RLDICR
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(ORI8
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(LIS8 (HI48_64 imm:$imm)),
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(HI32_48 imm:$imm)),
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32, 31),
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(HI16 imm:$imm)),
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(LO16 imm:$imm))>;
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// Extensions and truncates to/from 32-bit regs.
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// Extensions and truncates to/from 32-bit regs.
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