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Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand. 

llvm-svn: 148833
This commit is contained in:
Owen Anderson 2012-01-24 18:37:29 +00:00
parent 14952a0e32
commit d845d9d9e9
8 changed files with 14 additions and 14 deletions
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2
llvm/lib/Target/ARM/ARMCodeEmitter.cpp
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@ -74,7 +74,7 @@ namespace {
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
bool runOnMachineFunction(MachineFunction &MF);

2
llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
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@ -64,7 +64,7 @@ public:
// getBinaryCodeForInstr - TableGen'erated function for getting the
// binary encoding for an instruction.
unsigned getBinaryCodeForInstr(const MCInst &MI,
uint64_t getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups) const;
/// getMachineOpValue - Return binary encoding of operand. If the machine

2
llvm/lib/Target/MBlaze/MCTargetDesc/MBlazeMCCodeEmitter.cpp
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@ -43,7 +43,7 @@ public:
// getBinaryCodeForInstr - TableGen'erated function for getting the
// binary encoding for an instruction.
unsigned getBinaryCodeForInstr(const MCInst &MI) const;
uint64_t getBinaryCodeForInstr(const MCInst &MI) const;
/// getMachineOpValue - Return binary encoding of operand. If the machine
/// operand requires relocation, record the relocation and return zero.

2
llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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@ -58,7 +58,7 @@ public:
// getBinaryCodeForInstr - TableGen'erated function for getting the
// binary encoding for an instruction.
unsigned getBinaryCodeForInstr(const MCInst &MI,
uint64_t getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups) const;
// getBranchJumpOpValue - Return binary encoding of the jump

2
llvm/lib/Target/Mips/MipsCodeEmitter.cpp
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@ -80,7 +80,7 @@ class MipsCodeEmitter : public MachineFunctionPass {
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
void emitInstruction(const MachineInstr &MI);

2
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
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@ -57,7 +57,7 @@ public:
// getBinaryCodeForInstr - TableGen'erated function for getting the
// binary encoding for an instruction.
unsigned getBinaryCodeForInstr(const MCInst &MI,
uint64_t getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups) const;
void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups) const {

2
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
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@ -50,7 +50,7 @@ namespace {
/// getBinaryCodeForInstr - This function, generated by the
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
MachineRelocation GetRelocation(const MachineOperand &MO,

14
llvm/utils/TableGen/CodeEmitterGen.cpp
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@ -169,13 +169,13 @@ AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
opShift = beginInstBit - beginVarBit;
if (opShift > 0) {
Case += " Value |= (op & " + utostr(opMask) + "U) << " +
Case += " Value |= (op & UINT64_C(" + utostr(opMask) + ")) << " +
itostr(opShift) + ";\n";
} else if (opShift < 0) {
Case += " Value |= (op & " + utostr(opMask) + "U) >> " +
Case += " Value |= (op & UINT64_C(" + utostr(opMask) + ")) >> " +
itostr(-opShift) + ";\n";
} else {
Case += " Value |= op & " + utostr(opMask) + "U;\n";
Case += " Value |= op & UINT64_C(" + utostr(opMask) + ");\n";
}
}
}
@ -220,7 +220,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
Target.getInstructionsByEnumValue();
// Emit function declaration
o << "unsigned " << Target.getName();
o << "uint64_t " << Target.getName();
if (MCEmitter)
o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
<< " SmallVectorImpl<MCFixup> &Fixups) const {\n";
@ -238,7 +238,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
if (R->getValueAsString("Namespace") == "TargetOpcode" ||
R->getValueAsBit("isPseudo")) {
o << " 0U,\n";
o << " UINT64_C(0),\n";
continue;
}
@ -250,9 +250,9 @@ void CodeEmitterGen::run(raw_ostream &o) {
if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1)))
Value |= B->getValue() << (e-i-1);
}
o << " " << Value << "U," << '\t' << "// " << R->getName() << "\n";
o << " UINT64_C(" << Value << ")," << '\t' << "// " << R->getName() << "\n";
}
o << " 0U\n };\n";
o << " UINT64_C(0)\n };\n";
// Map to accumulate all the cases.
std::map<std::string, std::vector<std::string> > CaseMap;