forked from OSchip/llvm-project
[mips] Factor out unaligned store lowering code.
llvm-svn: 182050
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@ -1999,16 +1999,8 @@ static SDValue createStoreLR(unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD,
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}
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// Expand an unaligned 32 or 64-bit integer store node.
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SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
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StoreSDNode *SD = cast<StoreSDNode>(Op);
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EVT MemVT = SD->getMemoryVT();
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// Return if store is aligned or if MemVT is neither i32 nor i64.
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if ((SD->getAlignment() >= MemVT.getSizeInBits() / 8) ||
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((MemVT != MVT::i32) && (MemVT != MVT::i64)))
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return SDValue();
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bool IsLittle = Subtarget->isLittle();
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static SDValue lowerUnalignedIntStore(StoreSDNode *SD, SelectionDAG &DAG,
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bool IsLittle) {
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SDValue Value = SD->getValue(), Chain = SD->getChain();
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EVT VT = Value.getValueType();
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@ -2035,6 +2027,18 @@ SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
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return createStoreLR(MipsISD::SDR, DAG, SD, SDL, IsLittle ? 0 : 7);
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}
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SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
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StoreSDNode *SD = cast<StoreSDNode>(Op);
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EVT MemVT = SD->getMemoryVT();
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// Lower unaligned integer stores.
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if ((SD->getAlignment() < MemVT.getSizeInBits() / 8) &&
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((MemVT == MVT::i32) || (MemVT == MVT::i64)))
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return lowerUnalignedIntStore(SD, DAG, Subtarget->isLittle());
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return SDValue();
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}
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SDValue MipsTargetLowering::lowerADD(SDValue Op, SelectionDAG &DAG) const {
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if (Op->getOperand(0).getOpcode() != ISD::FRAMEADDR
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|| cast<ConstantSDNode>
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