forked from OSchip/llvm-project
FastISel: Remove unused/un-overridden entry points. NFCI.
llvm-svn: 283366
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@ -356,19 +356,6 @@ protected:
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virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
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virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
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bool Op0IsKill, uint64_t Imm);
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bool Op0IsKill, uint64_t Imm);
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/// \brief This method is called by target-independent code to request that an
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/// instruction with the given type, opcode, and register and floating-point
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/// immediate operands be emitted.
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virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
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bool Op0IsKill, const ConstantFP *FPImm);
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/// \brief This method is called by target-independent code to request that an
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/// instruction with the given type, opcode, and register and immediate
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/// operands be emitted.
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virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode,
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unsigned Op0, bool Op0IsKill, unsigned Op1,
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bool Op1IsKill, uint64_t Imm);
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/// \brief This method is a wrapper of fastEmit_ri.
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/// \brief This method is a wrapper of fastEmit_ri.
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///
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///
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/// It first tries to emit an instruction with an immediate operand using
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/// It first tries to emit an instruction with an immediate operand using
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@ -455,17 +455,6 @@ bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) {
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return true;
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return true;
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}
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}
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// Check if the second operand is a constant float.
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if (const auto *CF = dyn_cast<ConstantFP>(I->getOperand(1))) {
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unsigned ResultReg = fastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(),
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ISDOpcode, Op0, Op0IsKill, CF);
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if (ResultReg) {
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// We successfully emitted code for the given LLVM Instruction.
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updateValueMap(I, ResultReg);
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return true;
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}
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}
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unsigned Op1 = getRegForValue(I->getOperand(1));
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unsigned Op1 = getRegForValue(I->getOperand(1));
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if (!Op1) // Unhandled operand. Halt "fast" selection and bail.
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if (!Op1) // Unhandled operand. Halt "fast" selection and bail.
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return false;
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return false;
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@ -1725,18 +1714,6 @@ unsigned FastISel::fastEmit_ri(MVT, MVT, unsigned, unsigned /*Op0*/,
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return 0;
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return 0;
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}
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}
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unsigned FastISel::fastEmit_rf(MVT, MVT, unsigned, unsigned /*Op0*/,
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bool /*Op0IsKill*/,
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const ConstantFP * /*FPImm*/) {
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return 0;
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}
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unsigned FastISel::fastEmit_rri(MVT, MVT, unsigned, unsigned /*Op0*/,
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bool /*Op0IsKill*/, unsigned /*Op1*/,
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bool /*Op1IsKill*/, uint64_t /*Imm*/) {
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return 0;
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}
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/// This method is a wrapper of fastEmit_ri. It first tries to emit an
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/// This method is a wrapper of fastEmit_ri. It first tries to emit an
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/// instruction with an immediate operand using fastEmit_ri.
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/// instruction with an immediate operand using fastEmit_ri.
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/// If that fails, it materializes the immediate into a register and try
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/// If that fails, it materializes the immediate into a register and try
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@ -564,8 +564,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) {
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Operands.PrintManglingSuffix(SuffixOS, ImmediatePredicates, true);
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Operands.PrintManglingSuffix(SuffixOS, ImmediatePredicates, true);
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SuffixOS.flush();
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SuffixOS.flush();
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if (!StringSwitch<bool>(ManglingSuffix)
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if (!StringSwitch<bool>(ManglingSuffix)
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.Cases("", "r", "rr", "ri", "rf", true)
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.Cases("", "r", "rr", "ri", "i", "f", true)
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.Cases("rri", "i", "f", true)
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.Default(false))
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.Default(false))
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continue;
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continue;
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