forked from OSchip/llvm-project
parent
7292c29bb5
commit
d79073dc2a
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@ -1146,38 +1146,28 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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// bits in Loc are zero.
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or32le(Loc, (Val & 0xFFF) << 10);
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break;
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case R_AARCH64_ADR_GOT_PAGE: {
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uint64_t X = Val;
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checkInt<33>(X, Type);
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updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
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case R_AARCH64_ADR_GOT_PAGE:
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checkInt<33>(Val, Type);
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updateAArch64Addr(Loc, (Val >> 12) & 0x1FFFFF); // X[32:12]
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break;
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}
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case R_AARCH64_ADR_PREL_LO21: {
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uint64_t X = Val;
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checkInt<21>(X, Type);
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updateAArch64Addr(Loc, X & 0x1FFFFF);
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case R_AARCH64_ADR_PREL_LO21:
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checkInt<21>(Val, Type);
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updateAArch64Addr(Loc, Val & 0x1FFFFF);
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break;
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}
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case R_AARCH64_ADR_PREL_PG_HI21:
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case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21: {
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uint64_t X = Val;
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checkInt<33>(X, Type);
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updateAArch64Addr(Loc, (X >> 12) & 0x1FFFFF); // X[32:12]
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case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
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checkInt<33>(Val, Type);
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updateAArch64Addr(Loc, (Val >> 12) & 0x1FFFFF); // X[32:12]
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break;
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}
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case R_AARCH64_CALL26:
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case R_AARCH64_JUMP26: {
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uint64_t X = Val;
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checkInt<28>(X, Type);
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or32le(Loc, (X & 0x0FFFFFFC) >> 2);
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case R_AARCH64_JUMP26:
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checkInt<28>(Val, Type);
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or32le(Loc, (Val & 0x0FFFFFFC) >> 2);
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break;
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}
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case R_AARCH64_CONDBR19: {
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uint64_t X = Val;
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checkInt<21>(X, Type);
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or32le(Loc, (X & 0x1FFFFC) << 3);
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case R_AARCH64_CONDBR19:
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checkInt<21>(Val, Type);
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or32le(Loc, (Val & 0x1FFFFC) << 3);
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break;
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}
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case R_AARCH64_LD64_GOT_LO12_NC:
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case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
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checkAlignment<8>(Val, Type);
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@ -1209,12 +1199,10 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
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case R_AARCH64_PREL64:
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write64le(Loc, Val);
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break;
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case R_AARCH64_TSTBR14: {
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uint64_t X = Val;
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checkInt<16>(X, Type);
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or32le(Loc, (X & 0xFFFC) << 3);
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case R_AARCH64_TSTBR14:
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checkInt<16>(Val, Type);
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or32le(Loc, (Val & 0xFFFC) << 3);
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break;
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}
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case R_AARCH64_TLSLE_ADD_TPREL_HI12: {
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uint64_t V = llvm::alignTo(TcbSize, Out<ELF64LE>::TlsPhdr->p_align) + Val;
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checkInt<24>(V, Type);
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