forked from OSchip/llvm-project
[x86] refactor masked load/store combine logic ; NFCI
llvm-svn: 260426
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@ -26748,6 +26748,31 @@ static int getOneTrueElt(SDValue V) {
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return TrueIndex;
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}
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/// Given a masked memory load/store operation, return true if it has one mask
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/// bit set. If it has one mask bit set, then also return the memory address of
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/// the scalar element to load/store, the vector index to insert/extract that
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/// scalar element, and the alignment for the scalar memory access.
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static bool getParamsForOneTrueMaskedElt(MaskedLoadStoreSDNode *MaskedOp,
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SelectionDAG &DAG, SDValue &Addr,
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SDValue &Index, unsigned &Alignment) {
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int TrueMaskElt = getOneTrueElt(MaskedOp->getMask());
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if (TrueMaskElt < 0)
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return false;
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// Get the address of the one scalar element that is specified by the mask
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// using the appropriate offset from the base pointer.
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EVT EltVT = MaskedOp->getMemoryVT().getVectorElementType();
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Addr = MaskedOp->getBasePtr();
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if (TrueMaskElt != 0) {
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unsigned Offset = TrueMaskElt * EltVT.getStoreSize();
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Addr = DAG.getMemBasePlusOffset(Addr, Offset, SDLoc(MaskedOp));
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}
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Index = DAG.getIntPtrConstant(TrueMaskElt, SDLoc(MaskedOp));
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Alignment = MinAlign(MaskedOp->getAlignment(), EltVT.getStoreSize());
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return true;
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}
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/// If exactly one element of the mask is set for a non-extending masked load,
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/// it is a scalar load and vector insert.
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/// Note: It is expected that the degenerate cases of an all-zeros or all-ones
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@ -26755,36 +26780,27 @@ static int getOneTrueElt(SDValue V) {
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static SDValue
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reduceMaskedLoadToScalarLoad(MaskedLoadSDNode *ML, SelectionDAG &DAG,
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TargetLowering::DAGCombinerInfo &DCI) {
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// FIXME: Refactor shared/similar logic with reduceMaskedStoreToScalarStore().
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// TODO: This is not x86-specific, so it could be lifted to DAGCombiner.
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// However, some target hooks may need to be added to know when the transform
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// is profitable. Endianness would also have to be considered.
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int TrueMaskElt = getOneTrueElt(ML->getMask());
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if (TrueMaskElt < 0)
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SDValue Addr, VecIndex;
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unsigned Alignment;
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if (!getParamsForOneTrueMaskedElt(ML, DAG, Addr, VecIndex, Alignment))
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return SDValue();
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SDLoc DL(ML);
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EVT VT = ML->getValueType(0);
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EVT EltVT = VT.getVectorElementType();
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// Load the one scalar element that is specified by the mask using the
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// appropriate offset from the base pointer.
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SDValue Addr = ML->getBasePtr();
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if (TrueMaskElt != 0) {
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unsigned Offset = TrueMaskElt * EltVT.getStoreSize();
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Addr = DAG.getMemBasePlusOffset(Addr, Offset, DL);
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}
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unsigned Alignment = MinAlign(ML->getAlignment(), EltVT.getStoreSize());
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SDLoc DL(ML);
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EVT VT = ML->getValueType(0);
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EVT EltVT = VT.getVectorElementType();
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SDValue Load = DAG.getLoad(EltVT, DL, ML->getChain(), Addr,
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ML->getPointerInfo(), ML->isVolatile(),
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ML->isNonTemporal(), ML->isInvariant(), Alignment);
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// Insert the loaded element into the appropriate place in the vector.
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SDValue InsertIndex = DAG.getIntPtrConstant(TrueMaskElt, DL);
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SDValue Insert = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VT, ML->getSrc0(),
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Load, InsertIndex);
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Load, VecIndex);
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return DCI.CombineTo(ML, Insert, Load.getValue(1), true);
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}
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@ -26881,26 +26897,19 @@ static SDValue reduceMaskedStoreToScalarStore(MaskedStoreSDNode *MS,
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// However, some target hooks may need to be added to know when the transform
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// is profitable. Endianness would also have to be considered.
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int TrueMaskElt = getOneTrueElt(MS->getMask());
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if (TrueMaskElt < 0)
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SDValue Addr, VecIndex;
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unsigned Alignment;
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if (!getParamsForOneTrueMaskedElt(MS, DAG, Addr, VecIndex, Alignment))
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return SDValue();
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// Extract the one scalar element that is actually being stored.
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SDLoc DL(MS);
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EVT VT = MS->getValue().getValueType();
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EVT EltVT = VT.getVectorElementType();
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// Extract the one scalar element that is actually being stored.
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SDValue ExtractIndex = DAG.getIntPtrConstant(TrueMaskElt, DL);
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SDValue Extract = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
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MS->getValue(), ExtractIndex);
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MS->getValue(), VecIndex);
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// Store that element at the appropriate offset from the base pointer.
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SDValue Addr = MS->getBasePtr();
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if (TrueMaskElt != 0) {
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unsigned Offset = TrueMaskElt * EltVT.getStoreSize();
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Addr = DAG.getMemBasePlusOffset(Addr, Offset, DL);
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}
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unsigned Alignment = MinAlign(MS->getAlignment(), EltVT.getStoreSize());
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return DAG.getStore(MS->getChain(), DL, Extract, Addr, MS->getPointerInfo(),
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MS->isVolatile(), MS->isNonTemporal(), Alignment);
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}
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