forked from OSchip/llvm-project
parent
20fca48341
commit
d729d0dcdb
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@ -122,7 +122,7 @@ Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
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}
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Instruction *InstCombiner::SimplifyMemSet(MemSetInst *MI) {
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unsigned Alignment = getKnownAlignment(MI->getDest());
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unsigned Alignment = getKnownAlignment(MI->getDest(), TD);
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if (MI->getAlignment() < Alignment) {
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MI->setAlignment(ConstantInt::get(MI->getAlignmentType(),
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Alignment, false));
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@ -629,7 +629,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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case Intrinsic::arm_neon_vst2lane:
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case Intrinsic::arm_neon_vst3lane:
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case Intrinsic::arm_neon_vst4lane: {
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unsigned MemAlign = getKnownAlignment(II->getArgOperand(0));
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unsigned MemAlign = getKnownAlignment(II->getArgOperand(0), TD);
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unsigned AlignArg = II->getNumArgOperands() - 1;
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ConstantInt *IntrAlign = dyn_cast<ConstantInt>(II->getArgOperand(AlignArg));
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if (IntrAlign && IntrAlign->getZExtValue() < MemAlign) {
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@ -715,7 +715,7 @@ unsigned llvm::getOrEnforceKnownAlignment(Value *V, unsigned PrefAlign,
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unsigned BitWidth = TD ? TD->getPointerSizeInBits() : 64;
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APInt Mask = APInt::getAllOnesValue(BitWidth);
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APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
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ComputeMaskedBits(V, Mask, KnownZero, KnownOne);
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ComputeMaskedBits(V, Mask, KnownZero, KnownOne, TD);
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unsigned TrailZ = KnownZero.countTrailingOnes();
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// Avoid trouble with rediculously large TrailZ values, such as
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