forked from OSchip/llvm-project
[TargetLowering] Add SimplifyMultipleUseDemandedBits 'all elements' helper wrapper. NFC.
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@ -3239,7 +3239,7 @@ public:
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/// Helper wrapper around SimplifyDemandedBits.
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/// Adds Op back to the worklist upon success.
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bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask,
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bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
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DAGCombinerInfo &DCI) const;
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/// More limited version of SimplifyDemandedBits that can be used to "look
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@ -3250,6 +3250,12 @@ public:
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SelectionDAG &DAG,
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unsigned Depth) const;
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/// Helper wrapper around SimplifyMultipleUseDemandedBits, demanding all
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/// elements.
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SDValue SimplifyMultipleUseDemandedBits(SDValue Op, const APInt &DemandedBits,
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SelectionDAG &DAG,
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unsigned Depth = 0) const;
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/// Look at Vector Op. At this point, we know that only the DemandedElts
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/// elements of the result of Op are ever used downstream. If we can use
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/// this information to simplify Op, create a new simplified DAG node and
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@ -3284,6 +3290,7 @@ public:
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const APInt &DemandedElts,
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const SelectionDAG &DAG,
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unsigned Depth = 0) const;
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/// Determine which of the bits specified in Mask are known to be either zero
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/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
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/// argument allows us to only collect the known bits that are shared by the
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@ -790,6 +790,17 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
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return SDValue();
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}
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SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
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SDValue Op, const APInt &DemandedBits, SelectionDAG &DAG,
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unsigned Depth) const {
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EVT VT = Op.getValueType();
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APInt DemandedElts = VT.isVector()
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? APInt::getAllOnesValue(VT.getVectorNumElements())
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: APInt(1, 1);
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return SimplifyMultipleUseDemandedBits(Op, DemandedBits, DemandedElts, DAG,
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Depth);
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}
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/// Look at Op. At this point, we know that only the OriginalDemandedBits of the
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/// result of Op are ever used downstream. If we can use this information to
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/// simplify Op, create a new simplified DAG node and return true, returning the
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@ -38426,15 +38426,10 @@ static SDValue combineVSelectToBLENDV(SDNode *N, SelectionDAG &DAG,
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}
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// Otherwise we can still at least try to simplify multiple use bits.
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APInt DemandedMask(APInt::getSignMask(BitWidth));
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APInt DemandedElts(APInt::getAllOnesValue(VT.getVectorNumElements()));
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KnownBits Known;
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TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(),
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!DCI.isBeforeLegalizeOps());
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if (SDValue V = TLI.SimplifyMultipleUseDemandedBits(Cond, DemandedMask,
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DemandedElts, DAG, 0))
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return DAG.getNode(X86ISD::BLENDV, SDLoc(N), N->getValueType(0),
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V, N->getOperand(1), N->getOperand(2));
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APInt DemandedBits(APInt::getSignMask(BitWidth));
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if (SDValue V = TLI.SimplifyMultipleUseDemandedBits(Cond, DemandedBits, DAG))
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return DAG.getNode(X86ISD::BLENDV, SDLoc(N), N->getValueType(0), V,
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N->getOperand(1), N->getOperand(2));
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return SDValue();
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}
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@ -42184,9 +42179,8 @@ static SDValue combineMaskedStore(SDNode *N, SelectionDAG &DAG,
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APInt DemandedBits(APInt::getSignMask(VT.getScalarSizeInBits()));
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if (TLI.SimplifyDemandedBits(Mask, DemandedBits, DCI))
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return SDValue(N, 0);
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APInt DemandedElts = APInt::getAllOnesValue(VT.getVectorNumElements());
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if (SDValue NewMask = TLI.SimplifyMultipleUseDemandedBits(
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Mask, DemandedBits, DemandedElts, DAG, 0))
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if (SDValue NewMask =
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TLI.SimplifyMultipleUseDemandedBits(Mask, DemandedBits, DAG))
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return DAG.getMaskedStore(Mst->getChain(), SDLoc(N), Mst->getValue(),
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Mst->getBasePtr(), Mst->getOffset(), NewMask,
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Mst->getMemoryVT(), Mst->getMemOperand(),
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