maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Doxygenify some comments. 

llvm-svn: 15360
This commit is contained in:
Alkis Evlogimenos 2004-07-31 08:57:27 +00:00
parent 91eae7e3d2
commit d6e20fbe12
1 changed files with 6 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
llvm/include/llvm/Target/TargetInstrInfo.h
View File

@ -147,27 +147,23 @@ public:
return get(Opcode).Flags & M_TERMINATOR_FLAG; return get(Opcode).Flags & M_TERMINATOR_FLAG;
} }
// /// Return true if the instruction is a register to register move
// Return true if the instruction is a register to register move and /// and leave the source and dest operands in the passed parameters.
// leave the source and dest operands in the passed parameters.
//
virtual bool isMoveInstr(const MachineInstr& MI, virtual bool isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg, unsigned& sourceReg,
unsigned& destReg) const { unsigned& destReg) const {
return false; return false;
} }
// /// Insert a goto (unconditional branch) sequence to MBB, right
// Insert a goto (unconditional branch) sequence to MBB, right /// before MBBI
// before MBBI
virtual void insertGoto(const MachineBasicBlock& MBB, virtual void insertGoto(const MachineBasicBlock& MBB,
MachineBasicBlock::iterator MBBI) const { MachineBasicBlock::iterator MBBI) const {
assert(0 && "Target didn't implement insertGoto!"); assert(0 && "Target didn't implement insertGoto!");
} }
// /// Reverses the branch condition of the MachineInstr pointed by
// Reverses the branch condition of the MachineInstr pointed by /// MI. The instruction is replaced and the new MI is returned.
// MI. The instruction is replaced and the new MI is returned.
virtual MachineBasicBlock::iterator virtual MachineBasicBlock::iterator
reverseBranchCondition(MachineBasicBlock::iterator MI) const { reverseBranchCondition(MachineBasicBlock::iterator MI) const {
assert(0 && "Target didn't implement reverseBranchCondition!"); assert(0 && "Target didn't implement reverseBranchCondition!");