forked from OSchip/llvm-project
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
llvm-svn: 16977
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@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
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let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
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"Arg3Type", "Arg4Type", "VMX", "PPC64"];
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let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
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let isLittleEndianEncoding = 1;
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}
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def PPC32 : Target {
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@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
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let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
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"Arg3Type", "Arg4Type", "VMX", "PPC64"];
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let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
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let isLittleEndianEncoding = 1;
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}
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def PPC64 : Target {
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@ -27,6 +27,8 @@ def PowerPCInstrInfo : InstrInfo {
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let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type",
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"Arg3Type", "Arg4Type", "VMX", "PPC64"];
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let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
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let isLittleEndianEncoding = 1;
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}
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def PowerPC : Target {
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