[globalisel][aarch64] Make getCopyMapping() take register banks ID's rather than IsGPR booleans

Summary:
This allows the function to handle architectures with more than two register banks.

Depends on D27978

Reviewers: ab, t.p.northover, rovka, qcolombet

Subscribers: aditya_nandakumar, kristof.beyls, aemerson, rengolin, vkalintiris, dberris, llvm-commits, rovka

Differential Revision: https://reviews.llvm.org/D27339

llvm-svn: 291902
This commit is contained in:
Daniel Sanders 2017-01-13 14:16:33 +00:00
parent 7f2a6d5e8c
commit d6a1831ea7
3 changed files with 38 additions and 27 deletions

View File

@ -299,13 +299,26 @@ AArch64GenRegisterBankInfo::getValueMapping(PartialMappingIdx RBIdx,
return &ValMappings[ValMappingIdx];
}
AArch64GenRegisterBankInfo::PartialMappingIdx
AArch64GenRegisterBankInfo::BankIDToCopyMapIdx[]{
PMI_FirstGPR, // GPR
PMI_FirstFPR, // FPR
PMI_None, // CCR
};
const RegisterBankInfo::ValueMapping *
AArch64GenRegisterBankInfo::getCopyMapping(bool DstIsGPR, bool SrcIsGPR,
unsigned Size) {
PartialMappingIdx DstRBIdx = DstIsGPR ? PMI_FirstGPR : PMI_FirstFPR;
PartialMappingIdx SrcRBIdx = SrcIsGPR ? PMI_FirstGPR : PMI_FirstFPR;
AArch64GenRegisterBankInfo::getCopyMapping(unsigned DstBankID,
unsigned SrcBankID, unsigned Size) {
assert(DstBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
assert(SrcBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];
PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];
assert(DstRBIdx != PMI_None && "No such mapping");
assert(SrcRBIdx != PMI_None && "No such mapping");
if (DstRBIdx == SrcRBIdx)
return getValueMapping(DstRBIdx, Size);
assert(Size <= 64 && "GPR cannot handle that size");
unsigned ValMappingIdx =
FirstCrossRegCpyIdx +

View File

@ -147,9 +147,8 @@ AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
unsigned PartialMapSrcIdx = PMI_##RBNameSrc##Size - PMI_Min; \
(void)PartialMapDstIdx; \
(void)PartialMapSrcIdx; \
const ValueMapping *Map = \
getCopyMapping(PMI_First##RBNameDst == PMI_FirstGPR, \
PMI_First##RBNameSrc == PMI_FirstGPR, Size); \
const ValueMapping *Map = getCopyMapping( \
AArch64::RBNameDst##RegBankID, AArch64::RBNameSrc##RegBankID, Size); \
(void)Map; \
assert(Map[0].BreakDown == \
&AArch64GenRegisterBankInfo::PartMappings[PartialMapDstIdx] && \
@ -277,21 +276,21 @@ AArch64RegisterBankInfo::getInstrAlternativeMappings(
InstructionMappings AltMappings;
InstructionMapping GPRMapping(
/*ID*/ 1, /*Cost*/ 1,
getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ true, Size),
getCopyMapping(AArch64::GPRRegBankID, AArch64::GPRRegBankID, Size),
/*NumOperands*/ 2);
InstructionMapping FPRMapping(
/*ID*/ 2, /*Cost*/ 1,
getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ false, Size),
getCopyMapping(AArch64::FPRRegBankID, AArch64::FPRRegBankID, Size),
/*NumOperands*/ 2);
InstructionMapping GPRToFPRMapping(
/*ID*/ 3,
/*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ true, Size),
getCopyMapping(AArch64::FPRRegBankID, AArch64::GPRRegBankID, Size),
/*NumOperands*/ 2);
InstructionMapping FPRToGPRMapping(
/*ID*/ 3,
/*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ false, Size),
getCopyMapping(AArch64::GPRRegBankID, AArch64::FPRRegBankID, Size),
/*NumOperands*/ 2);
AltMappings.emplace_back(std::move(GPRMapping));
@ -456,9 +455,10 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
DstIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
const RegisterBank &SrcRB =
SrcIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
return InstructionMapping{DefaultMappingID, copyCost(DstRB, SrcRB, Size),
getCopyMapping(DstIsGPR, SrcIsGPR, Size),
/*NumOperands*/ 2};
return InstructionMapping{
DefaultMappingID, copyCost(DstRB, SrcRB, Size),
getCopyMapping(DstRB.getID(), SrcRB.getID(), Size),
/*NumOperands*/ 2};
}
case TargetOpcode::G_SEQUENCE:
// FIXME: support this, but the generic code is really not going to do

View File

@ -36,13 +36,6 @@ private:
protected:
AArch64GenRegisterBankInfo();
public:
static RegisterBankInfo::PartialMapping PartMappings[];
static RegisterBankInfo::ValueMapping ValMappings[];
static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
unsigned ValLength, const RegisterBank &RB);
static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
unsigned Size, unsigned Offset);
enum PartialMappingIdx {
PMI_None = -1,
PMI_GPR32 = 1,
@ -59,6 +52,10 @@ public:
PMI_Min = PMI_FirstGPR,
};
static RegisterBankInfo::PartialMapping PartMappings[];
static RegisterBankInfo::ValueMapping ValMappings[];
static PartialMappingIdx BankIDToCopyMapIdx[];
enum ValueMappingIdx {
First3OpsIdx = 0,
Last3OpsIdx = 18,
@ -68,6 +65,10 @@ public:
DistanceBetweenCrossRegCpy = 2
};
static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
unsigned ValLength, const RegisterBank &RB);
static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
unsigned Size, unsigned Offset);
static bool checkPartialMappingIdx(PartialMappingIdx FirstAlias,
PartialMappingIdx LastAlias,
ArrayRef<PartialMappingIdx> Order);
@ -85,13 +86,10 @@ public:
getValueMapping(PartialMappingIdx RBIdx, unsigned Size);
/// Get the pointer to the ValueMapping of the operands of a copy
/// instruction from a GPR or FPR register to a GPR or FPR register
/// with a size of \p Size.
///
/// If \p DstIsGPR is true, the destination of the copy is on GPR,
/// otherwise it is on FPR. Same thing for \p SrcIsGPR.
/// instruction from the \p SrcBankID register bank to the \p DstBankID
/// register bank with a size of \p Size.
static const RegisterBankInfo::ValueMapping *
getCopyMapping(bool DstIsGPR, bool SrcIsGPR, unsigned Size);
getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size);
};
/// This class provides the information for the target register banks.