forked from OSchip/llvm-project
[globalisel][aarch64] Make getCopyMapping() take register banks ID's rather than IsGPR booleans
Summary: This allows the function to handle architectures with more than two register banks. Depends on D27978 Reviewers: ab, t.p.northover, rovka, qcolombet Subscribers: aditya_nandakumar, kristof.beyls, aemerson, rengolin, vkalintiris, dberris, llvm-commits, rovka Differential Revision: https://reviews.llvm.org/D27339 llvm-svn: 291902
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@ -299,13 +299,26 @@ AArch64GenRegisterBankInfo::getValueMapping(PartialMappingIdx RBIdx,
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return &ValMappings[ValMappingIdx];
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}
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AArch64GenRegisterBankInfo::PartialMappingIdx
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AArch64GenRegisterBankInfo::BankIDToCopyMapIdx[]{
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PMI_FirstGPR, // GPR
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PMI_FirstFPR, // FPR
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PMI_None, // CCR
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};
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const RegisterBankInfo::ValueMapping *
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AArch64GenRegisterBankInfo::getCopyMapping(bool DstIsGPR, bool SrcIsGPR,
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unsigned Size) {
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PartialMappingIdx DstRBIdx = DstIsGPR ? PMI_FirstGPR : PMI_FirstFPR;
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PartialMappingIdx SrcRBIdx = SrcIsGPR ? PMI_FirstGPR : PMI_FirstFPR;
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AArch64GenRegisterBankInfo::getCopyMapping(unsigned DstBankID,
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unsigned SrcBankID, unsigned Size) {
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assert(DstBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
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assert(SrcBankID < AArch64::NumRegisterBanks && "Invalid bank ID");
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PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];
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PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];
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assert(DstRBIdx != PMI_None && "No such mapping");
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assert(SrcRBIdx != PMI_None && "No such mapping");
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if (DstRBIdx == SrcRBIdx)
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return getValueMapping(DstRBIdx, Size);
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assert(Size <= 64 && "GPR cannot handle that size");
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unsigned ValMappingIdx =
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FirstCrossRegCpyIdx +
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@ -147,9 +147,8 @@ AArch64RegisterBankInfo::AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
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unsigned PartialMapSrcIdx = PMI_##RBNameSrc##Size - PMI_Min; \
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(void)PartialMapDstIdx; \
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(void)PartialMapSrcIdx; \
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const ValueMapping *Map = \
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getCopyMapping(PMI_First##RBNameDst == PMI_FirstGPR, \
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PMI_First##RBNameSrc == PMI_FirstGPR, Size); \
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const ValueMapping *Map = getCopyMapping( \
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AArch64::RBNameDst##RegBankID, AArch64::RBNameSrc##RegBankID, Size); \
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(void)Map; \
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assert(Map[0].BreakDown == \
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&AArch64GenRegisterBankInfo::PartMappings[PartialMapDstIdx] && \
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@ -277,21 +276,21 @@ AArch64RegisterBankInfo::getInstrAlternativeMappings(
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InstructionMappings AltMappings;
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InstructionMapping GPRMapping(
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/*ID*/ 1, /*Cost*/ 1,
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getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ true, Size),
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getCopyMapping(AArch64::GPRRegBankID, AArch64::GPRRegBankID, Size),
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/*NumOperands*/ 2);
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InstructionMapping FPRMapping(
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/*ID*/ 2, /*Cost*/ 1,
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getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ false, Size),
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getCopyMapping(AArch64::FPRRegBankID, AArch64::FPRRegBankID, Size),
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/*NumOperands*/ 2);
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InstructionMapping GPRToFPRMapping(
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/*ID*/ 3,
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/*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
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getCopyMapping(/*DstIsGPR*/ false, /*SrcIsGPR*/ true, Size),
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getCopyMapping(AArch64::FPRRegBankID, AArch64::GPRRegBankID, Size),
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/*NumOperands*/ 2);
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InstructionMapping FPRToGPRMapping(
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/*ID*/ 3,
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/*Cost*/ copyCost(AArch64::GPRRegBank, AArch64::FPRRegBank, Size),
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getCopyMapping(/*DstIsGPR*/ true, /*SrcIsGPR*/ false, Size),
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getCopyMapping(AArch64::GPRRegBankID, AArch64::FPRRegBankID, Size),
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/*NumOperands*/ 2);
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AltMappings.emplace_back(std::move(GPRMapping));
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@ -456,9 +455,10 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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DstIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
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const RegisterBank &SrcRB =
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SrcIsGPR ? AArch64::GPRRegBank : AArch64::FPRRegBank;
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return InstructionMapping{DefaultMappingID, copyCost(DstRB, SrcRB, Size),
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getCopyMapping(DstIsGPR, SrcIsGPR, Size),
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/*NumOperands*/ 2};
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return InstructionMapping{
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DefaultMappingID, copyCost(DstRB, SrcRB, Size),
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getCopyMapping(DstRB.getID(), SrcRB.getID(), Size),
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/*NumOperands*/ 2};
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}
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case TargetOpcode::G_SEQUENCE:
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// FIXME: support this, but the generic code is really not going to do
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@ -36,13 +36,6 @@ private:
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protected:
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AArch64GenRegisterBankInfo();
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public:
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static RegisterBankInfo::PartialMapping PartMappings[];
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static RegisterBankInfo::ValueMapping ValMappings[];
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static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
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unsigned ValLength, const RegisterBank &RB);
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static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
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unsigned Size, unsigned Offset);
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enum PartialMappingIdx {
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PMI_None = -1,
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PMI_GPR32 = 1,
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@ -59,6 +52,10 @@ public:
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PMI_Min = PMI_FirstGPR,
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};
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static RegisterBankInfo::PartialMapping PartMappings[];
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static RegisterBankInfo::ValueMapping ValMappings[];
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static PartialMappingIdx BankIDToCopyMapIdx[];
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enum ValueMappingIdx {
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First3OpsIdx = 0,
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Last3OpsIdx = 18,
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@ -68,6 +65,10 @@ public:
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DistanceBetweenCrossRegCpy = 2
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};
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static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
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unsigned ValLength, const RegisterBank &RB);
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static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
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unsigned Size, unsigned Offset);
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static bool checkPartialMappingIdx(PartialMappingIdx FirstAlias,
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PartialMappingIdx LastAlias,
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ArrayRef<PartialMappingIdx> Order);
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@ -85,13 +86,10 @@ public:
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getValueMapping(PartialMappingIdx RBIdx, unsigned Size);
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/// Get the pointer to the ValueMapping of the operands of a copy
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/// instruction from a GPR or FPR register to a GPR or FPR register
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/// with a size of \p Size.
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///
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/// If \p DstIsGPR is true, the destination of the copy is on GPR,
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/// otherwise it is on FPR. Same thing for \p SrcIsGPR.
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/// instruction from the \p SrcBankID register bank to the \p DstBankID
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/// register bank with a size of \p Size.
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static const RegisterBankInfo::ValueMapping *
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getCopyMapping(bool DstIsGPR, bool SrcIsGPR, unsigned Size);
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getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size);
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};
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/// This class provides the information for the target register banks.
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