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[SelectionDAG] Add support for vector demandedelts in TRUNCATE opcodes 

llvm-svn: 286481
This commit is contained in:
Simon Pilgrim 2016-11-10 17:43:52 +00:00
parent 5492f8646c
commit d67af68f06
2 changed files with 4 additions and 13 deletions
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3
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -2394,7 +2394,8 @@ void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
unsigned InBits = InVT.getScalarSizeInBits();
KnownZero = KnownZero.zext(InBits);
KnownOne = KnownOne.zext(InBits);
computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
Depth + 1);
KnownZero = KnownZero.trunc(BitWidth);
KnownOne = KnownOne.trunc(BitWidth);
break;

14
llvm/test/CodeGen/X86/known-bits-vector.ll
View File

@ -190,22 +190,12 @@ define <4 x i32> @knownbits_mask_mul_shuffle_shl(<4 x i32> %a0, <4 x i32> %a1) n
define <4 x i32> @knownbits_mask_trunc_shuffle_shl(<4 x i64> %a0) nounwind {
; X32-LABEL: knownbits_mask_trunc_shuffle_shl:
; X32: # BB#0:
; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm1
; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2]
; X32-NEXT: vpslld $22, %xmm0, %xmm0
; X32-NEXT: vzeroupper
; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: knownbits_mask_trunc_shuffle_shl:
; X64: # BB#0:
; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm1
; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2]
; X64-NEXT: vpslld $22, %xmm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <4 x i64> %a0, <i64 -65536, i64 -7, i64 7, i64 -65536>
%2 = trunc <4 x i64> %1 to <4 x i32>