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[mips] Rename instruction DANDi to ANDi64. 

No functionality change.

llvm-svn: 187469
This commit is contained in:
Akira Hatanaka 2013-07-31 00:57:41 +00:00
parent f8fff213d5
commit d6445686a9
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/Target/Mips/Mips64InstrInfo.td
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@ -81,13 +81,13 @@ def DADDi : ArithLogicI<"daddi", simm16_64, CPU64RegsOpnd>, ADDI_FM<0x18>;
def DADDiu : ArithLogicI<"daddiu", simm16_64, CPU64RegsOpnd, IIArith,
immSExt16, add>,
ADDI_FM<0x19>, IsAsCheapAsAMove;
def DANDi : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
and>,
ADDI_FM<0xc>;
def SLTi64 : SetCC_I<"slti", setlt, simm16_64, immSExt16, CPU64Regs>,
SLTI_FM<0xa>;
def SLTiu64 : SetCC_I<"sltiu", setult, simm16_64, immSExt16, CPU64Regs>,
SLTI_FM<0xb>;
def ANDi64 : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
and>,
ADDI_FM<0xc>;
def ORi64 : ArithLogicI<"ori", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
or>,
ADDI_FM<0xd>;
@ -338,7 +338,7 @@ def : InstAlias<"move $dst, $src",
(DADDu CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 1>,
Requires<[HasMips64]>;
def : InstAlias<"and $rs, $rt, $imm",
(DANDi CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm),
(ANDi64 CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm),
1>,
Requires<[HasMips64]>;
def : InstAlias<"slt $rs, $rt, $imm",