forked from OSchip/llvm-project
parent
c4d3d3a16e
commit
d5f91fd883
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@ -361,6 +361,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
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setSchedulingPreference(Sched::RegPressure);
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setJumpIsExpensive(true);
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setSelectIsExpensive(false);
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PredictableSelectIsExpensive = false;
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// There are no integer divide instructions, and these expand to a pretty
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// large sequence of instructions.
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setIntDivIsCheap(false);
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@ -383,6 +386,10 @@ MVT AMDGPUTargetLowering::getVectorIdxTy() const {
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return MVT::i32;
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}
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bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const {
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return true;
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}
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// The backend supports 32 and 64 bit floating point immediates.
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// FIXME: Why are we reporting vectors of FP immediates as legal?
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bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
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