forked from OSchip/llvm-project
Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.
Patch by Jack Carter. llvm-svn: 144139
This commit is contained in:
parent
39674fc008
commit
d5edb3847a
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@ -13,8 +13,10 @@
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#define DEBUG_TYPE "asm-printer"
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#include "MipsInstPrinter.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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@ -74,6 +76,52 @@ void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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printAnnotation(O, Annot);
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}
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static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
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int Offset = 0;
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const MCSymbolRefExpr *SRE;
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if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr)) {
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SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
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assert(SRE && CE && "Binary expression must be sym+const.");
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Offset = CE->getValue();
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}
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else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))
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assert(false && "Unexpected MCExpr type.");
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MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
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switch (Kind) {
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default: assert(0 && "Invalid kind!");
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case MCSymbolRefExpr::VK_None: break;
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case MCSymbolRefExpr::VK_Mips_GPREL: OS << "%gp_rel("; break;
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case MCSymbolRefExpr::VK_Mips_GOT_CALL: OS << "%call16("; break;
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case MCSymbolRefExpr::VK_Mips_GOT: OS << "%got("; break;
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case MCSymbolRefExpr::VK_Mips_ABS_HI: OS << "%hi("; break;
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case MCSymbolRefExpr::VK_Mips_ABS_LO: OS << "%lo("; break;
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case MCSymbolRefExpr::VK_Mips_TLSGD: OS << "%tlsgd("; break;
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case MCSymbolRefExpr::VK_Mips_GOTTPREL: OS << "%gottprel("; break;
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case MCSymbolRefExpr::VK_Mips_TPREL_HI: OS << "%tprel_hi("; break;
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case MCSymbolRefExpr::VK_Mips_TPREL_LO: OS << "%tprel_lo("; break;
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case MCSymbolRefExpr::VK_Mips_GPOFF_HI: OS << "%hi(%neg(%gp_rel("; break;
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case MCSymbolRefExpr::VK_Mips_GPOFF_LO: OS << "%lo(%neg(%gp_rel("; break;
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case MCSymbolRefExpr::VK_Mips_GOT_DISP: OS << "%got_disp("; break;
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case MCSymbolRefExpr::VK_Mips_GOT_PAGE: OS << "%got_page("; break;
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case MCSymbolRefExpr::VK_Mips_GOT_OFST: OS << "%got_ofst("; break;
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}
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OS << SRE->getSymbol();
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if (Offset) {
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if (Offset > 0)
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OS << '+';
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OS << Offset;
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}
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if (Kind != MCSymbolRefExpr::VK_None)
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OS << ')';
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}
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void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O) {
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const MCOperand &Op = MI->getOperand(OpNo);
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@ -88,7 +136,7 @@ void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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}
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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O << *Op.getExpr();
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printExpr(Op.getExpr(), O);
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}
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void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
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@ -13,13 +13,17 @@
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mips-asm-printer"
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#include "MipsAsmPrinter.h"
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#include "Mips.h"
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#include "MipsAsmPrinter.h"
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#include "MipsInstrInfo.h"
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#include "MipsMachineFunction.h"
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#include "MipsMCInstLower.h"
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#include "MipsMCSymbolRefExpr.h"
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#include "InstPrinter/MipsInstPrinter.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/Analysis/DebugInfo.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Instructions.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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@ -27,19 +31,17 @@
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/Instructions.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/Mangler.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Analysis/DebugInfo.h"
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using namespace llvm;
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@ -50,6 +52,12 @@ static bool isUnalignedLoadStore(unsigned Opc) {
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Opc == Mips::USW_P8 || Opc == Mips::USH_P8;
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}
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static bool isDirective(unsigned Opc) {
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return Opc == Mips::MACRO || Opc == Mips::NOMACRO ||
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Opc == Mips::REORDER || Opc == Mips::NOREORDER ||
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Opc == Mips::ATMACRO || Opc == Mips::NOAT;
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}
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void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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@ -62,8 +70,12 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MipsMCInstLower MCInstLowering(Mang, *MF, *this);
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unsigned Opc = MI->getOpcode();
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MCInst TmpInst0;
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SmallVector<MCInst, 4> MCInsts;
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MCInstLowering.Lower(MI, TmpInst0);
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if (!OutStreamer.hasRawTextSupport() && isDirective(Opc))
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return;
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// Enclose unaligned load or store with .macro & .nomacro directives.
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if (isUnalignedLoadStore(Opc)) {
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MCInst Directive;
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@ -75,6 +87,23 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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return;
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}
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if (!OutStreamer.hasRawTextSupport()) {
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// Lower CPLOAD and CPRESTORE
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if (Opc == Mips::CPLOAD) {
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MCInstLowering.LowerCPLOAD(MI, MCInsts);
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for (SmallVector<MCInst, 4>::iterator I = MCInsts.begin();
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I != MCInsts.end(); ++I)
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OutStreamer.EmitInstruction(*I);
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return;
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}
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if (Opc == Mips::CPRESTORE) {
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MCInstLowering.LowerCPRESTORE(MI, TmpInst0);
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OutStreamer.EmitInstruction(TmpInst0);
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return;
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}
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}
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OutStreamer.EmitInstruction(TmpInst0);
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}
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@ -191,7 +220,8 @@ void MipsAsmPrinter::emitFrameDirective() {
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unsigned returnReg = RI.getRARegister();
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unsigned stackSize = MF->getFrameInfo()->getStackSize();
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OutStreamer.EmitRawText("\t.frame\t$" +
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.frame\t$" +
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StringRef(MipsInstPrinter::getRegisterName(stackReg)).lower() +
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"," + Twine(stackSize) + ",$" +
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StringRef(MipsInstPrinter::getRegisterName(returnReg)).lower());
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@ -212,7 +242,8 @@ const char *MipsAsmPrinter::getCurrentABIString() const {
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}
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void MipsAsmPrinter::EmitFunctionEntryLabel() {
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OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
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OutStreamer.EmitLabel(CurrentFnSym);
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}
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@ -221,10 +252,12 @@ void MipsAsmPrinter::EmitFunctionEntryLabel() {
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void MipsAsmPrinter::EmitFunctionBodyStart() {
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emitFrameDirective();
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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printSavedRegsBitmask(OS);
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OutStreamer.EmitRawText(OS.str());
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if (OutStreamer.hasRawTextSupport()) {
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SmallString<128> Str;
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raw_svector_ostream OS(Str);
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printSavedRegsBitmask(OS);
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OutStreamer.EmitRawText(OS.str());
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}
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}
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/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
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// There are instruction for this macros, but they must
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// always be at the function end, and we can't emit and
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// break with BB logic.
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OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
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OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
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OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
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if (OutStreamer.hasRawTextSupport()) {
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OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
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OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
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OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
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}
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}
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/// isBlockOnlyReachableByFallthough - Return true if the basic block has
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/// exactly one predecessor and the control transfer mechanism between
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/// the predecessor and this block is a fall-through.
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@ -419,18 +453,22 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
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// FIXME: Use SwitchSection.
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// Tell the assembler which ABI we are using
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OutStreamer.EmitRawText("\t.section .mdebug." + Twine(getCurrentABIString()));
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText("\t.section .mdebug." + Twine(getCurrentABIString()));
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// TODO: handle O64 ABI
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if (Subtarget->isABI_EABI()) {
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if (Subtarget->isGP32bit())
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OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long32"));
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else
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OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long64"));
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if (OutStreamer.hasRawTextSupport()) {
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if (Subtarget->isABI_EABI()) {
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if (Subtarget->isGP32bit())
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OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long32"));
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else
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OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long64"));
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}
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}
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// return to previous section
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OutStreamer.EmitRawText(StringRef("\t.previous"));
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if (OutStreamer.hasRawTextSupport())
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OutStreamer.EmitRawText(StringRef("\t.previous"));
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}
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MachineLocation
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@ -12,14 +12,14 @@
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//
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//===----------------------------------------------------------------------===//
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#include "MipsMCInstLower.h"
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#include "MipsAsmPrinter.h"
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#include "MipsInstrInfo.h"
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#include "MipsMCSymbolRefExpr.h"
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#include "MipsMCInstLower.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Target/Mangler.h"
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using namespace llvm;
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@ -31,26 +31,26 @@ MipsMCInstLower::MipsMCInstLower(Mangler *mang, const MachineFunction &mf,
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MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
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MachineOperandType MOTy,
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unsigned Offset) const {
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MipsMCSymbolRefExpr::VariantKind Kind;
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MCSymbolRefExpr::VariantKind Kind;
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const MCSymbol *Symbol;
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switch(MO.getTargetFlags()) {
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default: assert(0 && "Invalid target flag!");
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case MipsII::MO_NO_FLAG: Kind = MipsMCSymbolRefExpr::VK_Mips_None; break;
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case MipsII::MO_GPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GPREL; break;
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case MipsII::MO_GOT_CALL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_CALL; break;
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case MipsII::MO_GOT: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT; break;
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case MipsII::MO_ABS_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_HI; break;
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case MipsII::MO_ABS_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_LO; break;
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case MipsII::MO_TLSGD: Kind = MipsMCSymbolRefExpr::VK_Mips_TLSGD; break;
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case MipsII::MO_GOTTPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOTTPREL; break;
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case MipsII::MO_TPREL_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_HI; break;
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case MipsII::MO_TPREL_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_LO; break;
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case MipsII::MO_GPOFF_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
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case MipsII::MO_GPOFF_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
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case MipsII::MO_GOT_DISP: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_DISP; break;
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case MipsII::MO_GOT_PAGE: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
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case MipsII::MO_GOT_OFST: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_OFST; break;
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case MipsII::MO_NO_FLAG: Kind = MCSymbolRefExpr::VK_None; break;
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case MipsII::MO_GPREL: Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
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case MipsII::MO_GOT_CALL: Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
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case MipsII::MO_GOT: Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
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case MipsII::MO_ABS_HI: Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
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case MipsII::MO_ABS_LO: Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
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case MipsII::MO_TLSGD: Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
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case MipsII::MO_GOTTPREL: Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
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case MipsII::MO_TPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
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case MipsII::MO_TPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
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case MipsII::MO_GPOFF_HI: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
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case MipsII::MO_GPOFF_LO: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
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case MipsII::MO_GOT_DISP: Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
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case MipsII::MO_GOT_PAGE: Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
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case MipsII::MO_GOT_OFST: Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
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}
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switch (MOTy) {
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llvm_unreachable("<unknown operand type>");
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}
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return MCOperand::CreateExpr(MipsMCSymbolRefExpr::Create(Kind, Symbol, Offset,
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Ctx));
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const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, Ctx);
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if (!Offset)
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return MCOperand::CreateExpr(MCSym);
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// Assume offset is never negative.
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assert(Offset > 0);
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const MCConstantExpr *OffsetExpr = MCConstantExpr::Create(Offset, Ctx);
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const MCBinaryExpr *AddExpr = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, Ctx);
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return MCOperand::CreateExpr(AddExpr);
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}
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// Lower ".cpload $reg" to
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// "lui $gp, %hi(_gp_disp)"
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// "addiu $gp, $gp, %lo(_gp_disp)"
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// "addu $gp. $gp, $reg"
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void MipsMCInstLower::LowerCPLOAD(const MachineInstr *MI,
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SmallVector<MCInst, 4>& MCInsts) {
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MCInst Lui, Addiu, Addu;
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StringRef SymName("_gp_disp");
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const MCSymbol *Symbol = Ctx.GetOrCreateSymbol(SymName);
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const MCSymbolRefExpr *MCSym;
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// lui $gp, %hi(_gp_disp)
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Lui.setOpcode(Mips::LUi);
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Lui.addOperand(MCOperand::CreateReg(Mips::GP));
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MCSym = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_Mips_ABS_HI, Ctx);
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Lui.addOperand(MCOperand::CreateExpr(MCSym));
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MCInsts.push_back(Lui);
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// addiu $gp, $gp, %lo(_gp_disp)
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Addiu.setOpcode(Mips::ADDiu);
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Addiu.addOperand(MCOperand::CreateReg(Mips::GP));
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Addiu.addOperand(MCOperand::CreateReg(Mips::GP));
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MCSym = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_Mips_ABS_LO, Ctx);
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Addiu.addOperand(MCOperand::CreateExpr(MCSym));
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MCInsts.push_back(Addiu);
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// addu $gp. $gp, $reg
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Addu.setOpcode(Mips::ADDu);
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Addu.addOperand(MCOperand::CreateReg(Mips::GP));
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Addu.addOperand(MCOperand::CreateReg(Mips::GP));
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const MachineOperand &MO = MI->getOperand(0);
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assert(MO.isReg() && "CPLOAD's operand must be a register.");
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Addu.addOperand(MCOperand::CreateReg(MO.getReg()));
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MCInsts.push_back(Addu);
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}
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||||
|
||||
// Lower ".cprestore offset" to "sw $gp, offset($sp)".
|
||||
void MipsMCInstLower::LowerCPRESTORE(const MachineInstr *MI, MCInst &OutMI) {
|
||||
OutMI.clear();
|
||||
OutMI.setOpcode(Mips::SW);
|
||||
OutMI.addOperand(MCOperand::CreateReg(Mips::GP));
|
||||
OutMI.addOperand(MCOperand::CreateReg(Mips::SP));
|
||||
const MachineOperand &MO = MI->getOperand(0);
|
||||
assert(MO.isImm() && "CPRESTORE's operand must be an immediate.");
|
||||
OutMI.addOperand(MCOperand::CreateImm(MO.getImm()));
|
||||
}
|
||||
|
||||
|
||||
MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO) const {
|
||||
MachineOperandType MOTy = MO.getType();
|
||||
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
|
||||
#ifndef MIPSMCINSTLOWER_H
|
||||
#define MIPSMCINSTLOWER_H
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/CodeGen/MachineOperand.h"
|
||||
#include "llvm/Support/Compiler.h"
|
||||
|
||||
|
@ -34,6 +35,8 @@ public:
|
|||
MipsMCInstLower(Mangler *mang, const MachineFunction &MF,
|
||||
MipsAsmPrinter &asmprinter);
|
||||
void Lower(const MachineInstr *MI, MCInst &OutMI) const;
|
||||
void LowerCPLOAD(const MachineInstr *MI, SmallVector<MCInst, 4>& MCInsts);
|
||||
void LowerCPRESTORE(const MachineInstr *MI, MCInst &OutMI);
|
||||
private:
|
||||
MCOperand LowerSymbolOperand(const MachineOperand &MO,
|
||||
MachineOperandType MOTy, unsigned Offset) const;
|
||||
|
|
Loading…
Reference in New Issue