Properly handle Mips MC relocations and lower cpload and cprestore macros to MCInsts.

Patch by Jack Carter.

llvm-svn: 144139
This commit is contained in:
Bruno Cardoso Lopes 2011-11-08 22:26:47 +00:00
parent 39674fc008
commit d5edb3847a
4 changed files with 191 additions and 45 deletions

View File

@ -13,8 +13,10 @@
#define DEBUG_TYPE "asm-printer"
#include "MipsInstPrinter.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -74,6 +76,52 @@ void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
printAnnotation(O, Annot);
}
static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
int Offset = 0;
const MCSymbolRefExpr *SRE;
if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr)) {
SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
assert(SRE && CE && "Binary expression must be sym+const.");
Offset = CE->getValue();
}
else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))
assert(false && "Unexpected MCExpr type.");
MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
switch (Kind) {
default: assert(0 && "Invalid kind!");
case MCSymbolRefExpr::VK_None: break;
case MCSymbolRefExpr::VK_Mips_GPREL: OS << "%gp_rel("; break;
case MCSymbolRefExpr::VK_Mips_GOT_CALL: OS << "%call16("; break;
case MCSymbolRefExpr::VK_Mips_GOT: OS << "%got("; break;
case MCSymbolRefExpr::VK_Mips_ABS_HI: OS << "%hi("; break;
case MCSymbolRefExpr::VK_Mips_ABS_LO: OS << "%lo("; break;
case MCSymbolRefExpr::VK_Mips_TLSGD: OS << "%tlsgd("; break;
case MCSymbolRefExpr::VK_Mips_GOTTPREL: OS << "%gottprel("; break;
case MCSymbolRefExpr::VK_Mips_TPREL_HI: OS << "%tprel_hi("; break;
case MCSymbolRefExpr::VK_Mips_TPREL_LO: OS << "%tprel_lo("; break;
case MCSymbolRefExpr::VK_Mips_GPOFF_HI: OS << "%hi(%neg(%gp_rel("; break;
case MCSymbolRefExpr::VK_Mips_GPOFF_LO: OS << "%lo(%neg(%gp_rel("; break;
case MCSymbolRefExpr::VK_Mips_GOT_DISP: OS << "%got_disp("; break;
case MCSymbolRefExpr::VK_Mips_GOT_PAGE: OS << "%got_page("; break;
case MCSymbolRefExpr::VK_Mips_GOT_OFST: OS << "%got_ofst("; break;
}
OS << SRE->getSymbol();
if (Offset) {
if (Offset > 0)
OS << '+';
OS << Offset;
}
if (Kind != MCSymbolRefExpr::VK_None)
OS << ')';
}
void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
raw_ostream &O) {
const MCOperand &Op = MI->getOperand(OpNo);
@ -88,7 +136,7 @@ void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
}
assert(Op.isExpr() && "unknown operand kind in printOperand");
O << *Op.getExpr();
printExpr(Op.getExpr(), O);
}
void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,

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@ -13,13 +13,17 @@
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "mips-asm-printer"
#include "MipsAsmPrinter.h"
#include "Mips.h"
#include "MipsAsmPrinter.h"
#include "MipsInstrInfo.h"
#include "MipsMachineFunction.h"
#include "MipsMCInstLower.h"
#include "MipsMCSymbolRefExpr.h"
#include "InstPrinter/MipsInstPrinter.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Analysis/DebugInfo.h"
#include "llvm/BasicBlock.h"
#include "llvm/Instructions.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
@ -27,19 +31,17 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/Instructions.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/Mangler.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Analysis/DebugInfo.h"
using namespace llvm;
@ -50,6 +52,12 @@ static bool isUnalignedLoadStore(unsigned Opc) {
Opc == Mips::USW_P8 || Opc == Mips::USH_P8;
}
static bool isDirective(unsigned Opc) {
return Opc == Mips::MACRO || Opc == Mips::NOMACRO ||
Opc == Mips::REORDER || Opc == Mips::NOREORDER ||
Opc == Mips::ATMACRO || Opc == Mips::NOAT;
}
void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
SmallString<128> Str;
raw_svector_ostream OS(Str);
@ -62,8 +70,12 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
MipsMCInstLower MCInstLowering(Mang, *MF, *this);
unsigned Opc = MI->getOpcode();
MCInst TmpInst0;
SmallVector<MCInst, 4> MCInsts;
MCInstLowering.Lower(MI, TmpInst0);
if (!OutStreamer.hasRawTextSupport() && isDirective(Opc))
return;
// Enclose unaligned load or store with .macro & .nomacro directives.
if (isUnalignedLoadStore(Opc)) {
MCInst Directive;
@ -75,6 +87,23 @@ void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
return;
}
if (!OutStreamer.hasRawTextSupport()) {
// Lower CPLOAD and CPRESTORE
if (Opc == Mips::CPLOAD) {
MCInstLowering.LowerCPLOAD(MI, MCInsts);
for (SmallVector<MCInst, 4>::iterator I = MCInsts.begin();
I != MCInsts.end(); ++I)
OutStreamer.EmitInstruction(*I);
return;
}
if (Opc == Mips::CPRESTORE) {
MCInstLowering.LowerCPRESTORE(MI, TmpInst0);
OutStreamer.EmitInstruction(TmpInst0);
return;
}
}
OutStreamer.EmitInstruction(TmpInst0);
}
@ -191,7 +220,8 @@ void MipsAsmPrinter::emitFrameDirective() {
unsigned returnReg = RI.getRARegister();
unsigned stackSize = MF->getFrameInfo()->getStackSize();
OutStreamer.EmitRawText("\t.frame\t$" +
if (OutStreamer.hasRawTextSupport())
OutStreamer.EmitRawText("\t.frame\t$" +
StringRef(MipsInstPrinter::getRegisterName(stackReg)).lower() +
"," + Twine(stackSize) + ",$" +
StringRef(MipsInstPrinter::getRegisterName(returnReg)).lower());
@ -212,7 +242,8 @@ const char *MipsAsmPrinter::getCurrentABIString() const {
}
void MipsAsmPrinter::EmitFunctionEntryLabel() {
OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
if (OutStreamer.hasRawTextSupport())
OutStreamer.EmitRawText("\t.ent\t" + Twine(CurrentFnSym->getName()));
OutStreamer.EmitLabel(CurrentFnSym);
}
@ -221,10 +252,12 @@ void MipsAsmPrinter::EmitFunctionEntryLabel() {
void MipsAsmPrinter::EmitFunctionBodyStart() {
emitFrameDirective();
SmallString<128> Str;
raw_svector_ostream OS(Str);
printSavedRegsBitmask(OS);
OutStreamer.EmitRawText(OS.str());
if (OutStreamer.hasRawTextSupport()) {
SmallString<128> Str;
raw_svector_ostream OS(Str);
printSavedRegsBitmask(OS);
OutStreamer.EmitRawText(OS.str());
}
}
/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
@ -233,12 +266,13 @@ void MipsAsmPrinter::EmitFunctionBodyEnd() {
// There are instruction for this macros, but they must
// always be at the function end, and we can't emit and
// break with BB logic.
OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
if (OutStreamer.hasRawTextSupport()) {
OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
}
}
/// isBlockOnlyReachableByFallthough - Return true if the basic block has
/// exactly one predecessor and the control transfer mechanism between
/// the predecessor and this block is a fall-through.
@ -419,18 +453,22 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
// FIXME: Use SwitchSection.
// Tell the assembler which ABI we are using
OutStreamer.EmitRawText("\t.section .mdebug." + Twine(getCurrentABIString()));
if (OutStreamer.hasRawTextSupport())
OutStreamer.EmitRawText("\t.section .mdebug." + Twine(getCurrentABIString()));
// TODO: handle O64 ABI
if (Subtarget->isABI_EABI()) {
if (Subtarget->isGP32bit())
OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long32"));
else
OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long64"));
if (OutStreamer.hasRawTextSupport()) {
if (Subtarget->isABI_EABI()) {
if (Subtarget->isGP32bit())
OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long32"));
else
OutStreamer.EmitRawText(StringRef("\t.section .gcc_compiled_long64"));
}
}
// return to previous section
OutStreamer.EmitRawText(StringRef("\t.previous"));
if (OutStreamer.hasRawTextSupport())
OutStreamer.EmitRawText(StringRef("\t.previous"));
}
MachineLocation

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@ -12,14 +12,14 @@
//
//===----------------------------------------------------------------------===//
#include "MipsMCInstLower.h"
#include "MipsAsmPrinter.h"
#include "MipsInstrInfo.h"
#include "MipsMCSymbolRefExpr.h"
#include "MipsMCInstLower.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/Target/Mangler.h"
using namespace llvm;
@ -31,26 +31,26 @@ MipsMCInstLower::MipsMCInstLower(Mangler *mang, const MachineFunction &mf,
MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
MachineOperandType MOTy,
unsigned Offset) const {
MipsMCSymbolRefExpr::VariantKind Kind;
MCSymbolRefExpr::VariantKind Kind;
const MCSymbol *Symbol;
switch(MO.getTargetFlags()) {
default: assert(0 && "Invalid target flag!");
case MipsII::MO_NO_FLAG: Kind = MipsMCSymbolRefExpr::VK_Mips_None; break;
case MipsII::MO_GPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GPREL; break;
case MipsII::MO_GOT_CALL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_CALL; break;
case MipsII::MO_GOT: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT; break;
case MipsII::MO_ABS_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_HI; break;
case MipsII::MO_ABS_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_ABS_LO; break;
case MipsII::MO_TLSGD: Kind = MipsMCSymbolRefExpr::VK_Mips_TLSGD; break;
case MipsII::MO_GOTTPREL: Kind = MipsMCSymbolRefExpr::VK_Mips_GOTTPREL; break;
case MipsII::MO_TPREL_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_HI; break;
case MipsII::MO_TPREL_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_TPREL_LO; break;
case MipsII::MO_GPOFF_HI: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
case MipsII::MO_GPOFF_LO: Kind = MipsMCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
case MipsII::MO_GOT_DISP: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_DISP; break;
case MipsII::MO_GOT_PAGE: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
case MipsII::MO_GOT_OFST: Kind = MipsMCSymbolRefExpr::VK_Mips_GOT_OFST; break;
case MipsII::MO_NO_FLAG: Kind = MCSymbolRefExpr::VK_None; break;
case MipsII::MO_GPREL: Kind = MCSymbolRefExpr::VK_Mips_GPREL; break;
case MipsII::MO_GOT_CALL: Kind = MCSymbolRefExpr::VK_Mips_GOT_CALL; break;
case MipsII::MO_GOT: Kind = MCSymbolRefExpr::VK_Mips_GOT; break;
case MipsII::MO_ABS_HI: Kind = MCSymbolRefExpr::VK_Mips_ABS_HI; break;
case MipsII::MO_ABS_LO: Kind = MCSymbolRefExpr::VK_Mips_ABS_LO; break;
case MipsII::MO_TLSGD: Kind = MCSymbolRefExpr::VK_Mips_TLSGD; break;
case MipsII::MO_GOTTPREL: Kind = MCSymbolRefExpr::VK_Mips_GOTTPREL; break;
case MipsII::MO_TPREL_HI: Kind = MCSymbolRefExpr::VK_Mips_TPREL_HI; break;
case MipsII::MO_TPREL_LO: Kind = MCSymbolRefExpr::VK_Mips_TPREL_LO; break;
case MipsII::MO_GPOFF_HI: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_HI; break;
case MipsII::MO_GPOFF_LO: Kind = MCSymbolRefExpr::VK_Mips_GPOFF_LO; break;
case MipsII::MO_GOT_DISP: Kind = MCSymbolRefExpr::VK_Mips_GOT_DISP; break;
case MipsII::MO_GOT_PAGE: Kind = MCSymbolRefExpr::VK_Mips_GOT_PAGE; break;
case MipsII::MO_GOT_OFST: Kind = MCSymbolRefExpr::VK_Mips_GOT_OFST; break;
}
switch (MOTy) {
@ -84,10 +84,67 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
llvm_unreachable("<unknown operand type>");
}
return MCOperand::CreateExpr(MipsMCSymbolRefExpr::Create(Kind, Symbol, Offset,
Ctx));
const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, Ctx);
if (!Offset)
return MCOperand::CreateExpr(MCSym);
// Assume offset is never negative.
assert(Offset > 0);
const MCConstantExpr *OffsetExpr = MCConstantExpr::Create(Offset, Ctx);
const MCBinaryExpr *AddExpr = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, Ctx);
return MCOperand::CreateExpr(AddExpr);
}
// Lower ".cpload $reg" to
// "lui $gp, %hi(_gp_disp)"
// "addiu $gp, $gp, %lo(_gp_disp)"
// "addu $gp. $gp, $reg"
void MipsMCInstLower::LowerCPLOAD(const MachineInstr *MI,
SmallVector<MCInst, 4>& MCInsts) {
MCInst Lui, Addiu, Addu;
StringRef SymName("_gp_disp");
const MCSymbol *Symbol = Ctx.GetOrCreateSymbol(SymName);
const MCSymbolRefExpr *MCSym;
// lui $gp, %hi(_gp_disp)
Lui.setOpcode(Mips::LUi);
Lui.addOperand(MCOperand::CreateReg(Mips::GP));
MCSym = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_Mips_ABS_HI, Ctx);
Lui.addOperand(MCOperand::CreateExpr(MCSym));
MCInsts.push_back(Lui);
// addiu $gp, $gp, %lo(_gp_disp)
Addiu.setOpcode(Mips::ADDiu);
Addiu.addOperand(MCOperand::CreateReg(Mips::GP));
Addiu.addOperand(MCOperand::CreateReg(Mips::GP));
MCSym = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_Mips_ABS_LO, Ctx);
Addiu.addOperand(MCOperand::CreateExpr(MCSym));
MCInsts.push_back(Addiu);
// addu $gp. $gp, $reg
Addu.setOpcode(Mips::ADDu);
Addu.addOperand(MCOperand::CreateReg(Mips::GP));
Addu.addOperand(MCOperand::CreateReg(Mips::GP));
const MachineOperand &MO = MI->getOperand(0);
assert(MO.isReg() && "CPLOAD's operand must be a register.");
Addu.addOperand(MCOperand::CreateReg(MO.getReg()));
MCInsts.push_back(Addu);
}
// Lower ".cprestore offset" to "sw $gp, offset($sp)".
void MipsMCInstLower::LowerCPRESTORE(const MachineInstr *MI, MCInst &OutMI) {
OutMI.clear();
OutMI.setOpcode(Mips::SW);
OutMI.addOperand(MCOperand::CreateReg(Mips::GP));
OutMI.addOperand(MCOperand::CreateReg(Mips::SP));
const MachineOperand &MO = MI->getOperand(0);
assert(MO.isImm() && "CPRESTORE's operand must be an immediate.");
OutMI.addOperand(MCOperand::CreateImm(MO.getImm()));
}
MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO) const {
MachineOperandType MOTy = MO.getType();

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@ -9,6 +9,7 @@
#ifndef MIPSMCINSTLOWER_H
#define MIPSMCINSTLOWER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/Support/Compiler.h"
@ -34,6 +35,8 @@ public:
MipsMCInstLower(Mangler *mang, const MachineFunction &MF,
MipsAsmPrinter &asmprinter);
void Lower(const MachineInstr *MI, MCInst &OutMI) const;
void LowerCPLOAD(const MachineInstr *MI, SmallVector<MCInst, 4>& MCInsts);
void LowerCPRESTORE(const MachineInstr *MI, MCInst &OutMI);
private:
MCOperand LowerSymbolOperand(const MachineOperand &MO,
MachineOperandType MOTy, unsigned Offset) const;