forked from OSchip/llvm-project
[SystemZ] New CL option to enable subreg liveness
This option is needed to enable subreg liveness tracking during register allocation. Review: Ulrich Weigand https://reviews.llvm.org/D50779 llvm-svn: 339776
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@ -19,6 +19,11 @@ using namespace llvm;
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#define GET_SUBTARGETINFO_CTOR
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#include "SystemZGenSubtargetInfo.inc"
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static cl::opt<bool> UseSubRegLiveness(
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"systemz-subreg-liveness",
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cl::desc("Enable subregister liveness tracking for SystemZ (experimental)"),
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cl::Hidden);
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// Pin the vtable to this file.
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void SystemZSubtarget::anchor() {}
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@ -54,6 +59,11 @@ SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
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TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
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TLInfo(TM, *this), TSInfo(), FrameLowering() {}
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bool SystemZSubtarget::enableSubRegLiveness() const {
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return UseSubRegLiveness;
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}
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bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
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CodeModel::Model CM) const {
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// PC32DBL accesses require the low bit to be clear. Note that a zero
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@ -102,6 +102,9 @@ public:
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// Always enable the early if-conversion pass.
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bool enableEarlyIfConversion() const override { return true; }
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// Enable tracking of subregister liveness in register allocator.
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bool enableSubRegLiveness() const override;
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// Automatically generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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