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[x86] regenerate checks 

llvm-svn: 281523
This commit is contained in:
Sanjay Patel 2016-09-14 19:42:03 +00:00
parent 780507c183
commit d56a27e242
1 changed files with 83 additions and 72 deletions
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155
llvm/test/CodeGen/X86/sext-i1.ll
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@ -1,96 +1,107 @@
; RUN: llc < %s -march=x86 -disable-cgp-branch-opts | FileCheck %s -check-prefix=32
; RUN: llc < %s -march=x86-64 -disable-cgp-branch-opts | FileCheck %s -check-prefix=64
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=CHECK --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=CHECK --check-prefix=X64
; rdar://7573216
; PR6146
define i32 @t1(i32 %x) nounwind readnone ssp {
entry:
; 32-LABEL: t1:
; 32: cmpl $1
; 32: sbbl
; 64-LABEL: t1:
; 64: cmpl $1
; 64: sbbl
%0 = icmp eq i32 %x, 0
%iftmp.0.0 = select i1 %0, i32 -1, i32 0
ret i32 %iftmp.0.0
; CHECK-LABEL: t1:
; CHECK: # BB#0:
; CHECK-NEXT: cmpl $1
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: ret
;
%t0 = icmp eq i32 %x, 0
%if = select i1 %t0, i32 -1, i32 0
ret i32 %if
}
define i32 @t2(i32 %x) nounwind readnone ssp {
entry:
; 32-LABEL: t2:
; 32: cmpl $1
; 32: sbbl
; 64-LABEL: t2:
; 64: cmpl $1
; 64: sbbl
%0 = icmp eq i32 %x, 0
%iftmp.0.0 = sext i1 %0 to i32
ret i32 %iftmp.0.0
; CHECK-LABEL: t2:
; CHECK: # BB#0:
; CHECK-NEXT: cmpl $1
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: ret
;
%t0 = icmp eq i32 %x, 0
%if = sext i1 %t0 to i32
ret i32 %if
}
%struct.zbookmark = type { i64, i64 }
%struct.zstream = type { }
define i32 @t3() nounwind readonly {
; X32-LABEL: t3:
; X32: # BB#0: # %entry
; X32-NEXT: cmpl $1, %eax
; X32-NEXT: sbbl %eax, %eax
; X32-NEXT: cmpl %eax, %eax
; X32-NEXT: sbbl %eax, %eax
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl
;
; X64-LABEL: t3:
; X64: # BB#0: # %entry
; X64-NEXT: cmpl $1, %eax
; X64-NEXT: sbbq %rax, %rax
; X64-NEXT: cmpq %rax, %rax
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
;
entry:
; 32-LABEL: t3:
; 32: cmpl $1
; 32: sbbl
; 32: cmpl
; 32: xorl
; 64-LABEL: t3:
; 64: cmpl $1
; 64: sbbq
; 64: cmpq
; 64: xorl
%not.tobool = icmp eq i32 undef, 0 ; <i1> [#uses=2]
%cond = sext i1 %not.tobool to i32 ; <i32> [#uses=1]
%conv = sext i1 %not.tobool to i64 ; <i64> [#uses=1]
%add13 = add i64 0, %conv ; <i64> [#uses=1]
%cmp = icmp ult i64 undef, %add13 ; <i1> [#uses=1]
%not.tobool = icmp eq i32 undef, 0
%cond = sext i1 %not.tobool to i32
%conv = sext i1 %not.tobool to i64
%add13 = add i64 0, %conv
%cmp = icmp ult i64 undef, %add13
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
if.then:
br label %if.end
if.end: ; preds = %if.then, %entry
%xor27 = xor i32 undef, %cond ; <i32> [#uses=0]
if.end:
%xor27 = xor i32 undef, %cond
ret i32 0
}
define i32 @t4(i64 %x) nounwind readnone ssp {
entry:
; 32-LABEL: t4:
; 32: movl
; 32: orl
; 32: movl
; 32: je
; 32: xorl
; 64-LABEL: t4:
; 64: cmpq $1
; 64: sbbl
%0 = icmp eq i64 %x, 0
%1 = sext i1 %0 to i32
ret i32 %1
; X32-LABEL: t4:
; X32: # BB#0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl $-1, %eax
; X32-NEXT: je .LBB3_2
; X32-NEXT: # BB#1:
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: .LBB3_2:
; X32-NEXT: retl
;
; X64-LABEL: t4:
; X64: # BB#0:
; X64-NEXT: cmpq $1, %rdi
; X64-NEXT: sbbl %eax, %eax
; X64-NEXT: retq
;
%t0 = icmp eq i64 %x, 0
%t1 = sext i1 %t0 to i32
ret i32 %t1
}
define i64 @t5(i32 %x) nounwind readnone ssp {
entry:
; 32-LABEL: t5:
; 32: cmpl $1
; 32: sbbl
; 32: movl
; 64-LABEL: t5:
; 64: cmpl $1
; 64: sbbq
%0 = icmp eq i32 %x, 0
%1 = sext i1 %0 to i64
ret i64 %1
; X32-LABEL: t5:
; X32: # BB#0:
; X32-NEXT: cmpl $1, {{[0-9]+}}(%esp)
; X32-NEXT: sbbl %eax, %eax
; X32-NEXT: movl %eax, %edx
; X32-NEXT: retl
;
; X64-LABEL: t5:
; X64: # BB#0:
; X64-NEXT: cmpl $1, %edi
; X64-NEXT: sbbq %rax, %rax
; X64-NEXT: retq
;
%t0 = icmp eq i32 %x, 0
%t1 = sext i1 %t0 to i64
ret i64 %t1
}