forked from OSchip/llvm-project
[TableGen] Replace InfoByHwMode::getAsString with writeToStream
Also add operator<< for use with raw_ostream to InfoByHwMode and its derived classes. llvm-svn: 313989
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@ -238,10 +238,14 @@ bool TypeSetByHwMode::operator==(const TypeSetByHwMode &VTS) const {
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return true;
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}
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raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T) {
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T.writeToStream(OS);
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return OS;
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}
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LLVM_DUMP_METHOD
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void TypeSetByHwMode::dump() const {
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writeToStream(dbgs());
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dbgs() << '\n';
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dbgs() << *this << '\n';
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}
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bool TypeSetByHwMode::intersect(SetType &Out, const SetType &In) {
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@ -240,6 +240,8 @@ private:
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bool intersect(SetType &Out, const SetType &In);
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};
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raw_ostream &operator<<(raw_ostream &OS, const TypeSetByHwMode &T);
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struct TypeInfer {
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TypeInfer(TreePattern &T) : TP(T), ForceMode(0) {}
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@ -836,7 +836,7 @@ bool CodeGenRegisterClass::contains(const CodeGenRegister *Reg) const {
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namespace llvm {
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raw_ostream &operator<<(raw_ostream &OS, const CodeGenRegisterClass::Key &K) {
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OS << "{ " << K.RSI.getAsString();
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OS << "{ " << K.RSI;
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for (const auto R : *K.Members)
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OS << ", " << R->getName();
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return OS << " }";
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@ -76,34 +76,31 @@ StringRef ValueTypeByHwMode::getMVTName(MVT T) {
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return N;
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}
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std::string ValueTypeByHwMode::getAsString() const {
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if (isSimple())
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return getMVTName(getSimple());
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void ValueTypeByHwMode::writeToStream(raw_ostream &OS) const {
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if (isSimple()) {
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OS << getMVTName(getSimple());
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return;
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}
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std::vector<const PairType*> Pairs;
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for (const auto &P : Map)
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Pairs.push_back(&P);
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std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
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std::stringstream str;
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str << '{';
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OS << '{';
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for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
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const PairType *P = Pairs[i];
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str << '(' << getModeName(P->first)
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OS << '(' << getModeName(P->first)
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<< ':' << getMVTName(P->second).str() << ')';
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if (i != e-1)
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str << ',';
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OS << ',';
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}
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str << '}';
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return str.str();
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OS << '}';
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}
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LLVM_DUMP_METHOD
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void ValueTypeByHwMode::dump() const {
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dbgs() << "size=" << Map.size() << '\n';
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for (const auto &P : Map)
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dbgs() << " " << P.first << " -> "
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<< llvm::getEnumName(P.second.SimpleTy) << '\n';
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dbgs() << *this << '\n';
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}
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ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec,
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@ -136,11 +133,9 @@ bool RegSizeInfo::isSubClassOf(const RegSizeInfo &I) const {
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SpillSize <= I.SpillSize;
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}
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std::string RegSizeInfo::getAsString() const {
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std::stringstream str;
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str << "[R=" << RegSize << ",S=" << SpillSize
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void RegSizeInfo::writeToStream(raw_ostream &OS) const {
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OS << "[R=" << RegSize << ",S=" << SpillSize
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<< ",A=" << SpillAlignment << ']';
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return str.str();
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}
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RegSizeInfoByHwMode::RegSizeInfoByHwMode(Record *R,
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@ -177,22 +172,35 @@ bool RegSizeInfoByHwMode::hasStricterSpillThan(const RegSizeInfoByHwMode &I)
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std::tie(B0.SpillSize, B0.SpillAlignment);
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}
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std::string RegSizeInfoByHwMode::getAsString() const {
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void RegSizeInfoByHwMode::writeToStream(raw_ostream &OS) const {
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typedef typename decltype(Map)::value_type PairType;
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std::vector<const PairType*> Pairs;
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for (const auto &P : Map)
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Pairs.push_back(&P);
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std::sort(Pairs.begin(), Pairs.end(), deref<std::less<PairType>>());
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std::stringstream str;
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str << '{';
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OS << '{';
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for (unsigned i = 0, e = Pairs.size(); i != e; ++i) {
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const PairType *P = Pairs[i];
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str << '(' << getModeName(P->first)
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<< ':' << P->second.getAsString() << ')';
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OS << '(' << getModeName(P->first) << ':' << P->second << ')';
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if (i != e-1)
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str << ',';
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OS << ',';
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}
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str << '}';
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return str.str();
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OS << '}';
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}
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raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T) {
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T.writeToStream(OS);
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return OS;
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}
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raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T) {
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T.writeToStream(OS);
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return OS;
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}
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raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T) {
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T.writeToStream(OS);
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return OS;
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}
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@ -27,6 +27,7 @@ namespace llvm {
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struct CodeGenHwModes;
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class Record;
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class raw_ostream;
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template <typename InfoT> struct InfoByHwMode;
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@ -130,7 +131,7 @@ struct ValueTypeByHwMode : public InfoByHwMode<MVT> {
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MVT &getOrCreateTypeForMode(unsigned Mode, MVT Type);
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static StringRef getMVTName(MVT T);
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std::string getAsString() const;
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void writeToStream(raw_ostream &OS) const;
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void dump() const;
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};
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@ -154,7 +155,7 @@ struct RegSizeInfo {
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}
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bool isSubClassOf(const RegSizeInfo &I) const;
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std::string getAsString() const;
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void writeToStream(raw_ostream &OS) const;
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};
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struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
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@ -169,8 +170,13 @@ struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
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bool isSubClassOf(const RegSizeInfoByHwMode &I) const;
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bool hasStricterSpillThan(const RegSizeInfoByHwMode &I) const;
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std::string getAsString() const;
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void writeToStream(raw_ostream &OS) const;
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};
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raw_ostream &operator<<(raw_ostream &OS, const ValueTypeByHwMode &T);
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raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfo &T);
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raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T);
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} // namespace llvm
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#endif // LLVM_UTILS_TABLEGEN_INFOBYHWMODE_H
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