forked from OSchip/llvm-project
Revert "[ELF2] - Implemented rel[a].plt sections"
This reverts commit r249816. It broke building llvm with lld: $ ./bin/FileCheck ./bin/FileCheck: error while loading shared libraries: unexpected PLT reloc type 0x06 I think the only thing that is wrong with this patch is that it is too soon. The plt we create (and its relocs) don't support lazy loading, so they have to be relocated as ordinary dynamic relocations. llvm-svn: 249835
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@ -48,10 +48,6 @@ template <> RelocationSection<ELF32BE> *Out<ELF32BE>::RelaDyn = nullptr;
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template <> RelocationSection<ELF32LE> *Out<ELF32LE>::RelaDyn = nullptr;
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template <> RelocationSection<ELF64BE> *Out<ELF64BE>::RelaDyn = nullptr;
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template <> RelocationSection<ELF64LE> *Out<ELF64LE>::RelaDyn = nullptr;
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template <> RelocationSection<ELF32BE> *Out<ELF32BE>::RelaPlt = nullptr;
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template <> RelocationSection<ELF32LE> *Out<ELF32LE>::RelaPlt = nullptr;
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template <> RelocationSection<ELF64BE> *Out<ELF64BE>::RelaPlt = nullptr;
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template <> RelocationSection<ELF64LE> *Out<ELF64LE>::RelaPlt = nullptr;
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template <> StringTableSection<false> *Out<ELF32BE>::DynStrTab = nullptr;
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template <> StringTableSection<false> *Out<ELF32LE>::DynStrTab = nullptr;
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template <> StringTableSection<true> *Out<ELF64BE>::DynStrTab = nullptr;
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@ -143,9 +139,10 @@ void PltSection<ELFT>::finalize() {
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}
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template <class ELFT>
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RelocationSection<ELFT>::RelocationSection(StringRef Name, bool IsRela)
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: OutputSectionBase<ELFT::Is64Bits>(Name, IsRela ? llvm::ELF::SHT_RELA
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: llvm::ELF::SHT_REL,
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RelocationSection<ELFT>::RelocationSection(bool IsRela)
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: OutputSectionBase<ELFT::Is64Bits>(IsRela ? ".rela.dyn" : ".rel.dyn",
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IsRela ? llvm::ELF::SHT_RELA
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: llvm::ELF::SHT_REL,
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llvm::ELF::SHF_ALLOC),
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IsRela(IsRela) {
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this->Header.sh_entsize = IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
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@ -303,13 +300,6 @@ template <class ELFT> void DynamicSection<ELFT>::finalize() {
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++NumEntries; // DT_RELASZ / DT_RELSZ
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++NumEntries; // DT_RELAENT / DT_RELENT
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}
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if (Out<ELFT>::RelaPlt->hasRelocs()) {
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++NumEntries; // DT_JMPREL
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++NumEntries; // DT_PLTRELSZ
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++NumEntries; // DT_PLTGOT
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++NumEntries; // DT_PLTREL
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}
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++NumEntries; // DT_SYMTAB
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++NumEntries; // DT_SYMENT
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++NumEntries; // DT_STRTAB
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@ -377,12 +367,6 @@ template <class ELFT> void DynamicSection<ELFT>::writeTo(uint8_t *Buf) {
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WriteVal(IsRela ? DT_RELAENT : DT_RELENT,
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IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel));
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}
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if (Out<ELFT>::RelaPlt->hasRelocs()) {
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WritePtr(DT_JMPREL, Out<ELFT>::RelaPlt->getVA());
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WriteVal(DT_PLTRELSZ, Out<ELFT>::RelaPlt->getSize());
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WritePtr(DT_PLTGOT, Out<ELFT>::Got->getVA());
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WriteVal(DT_PLTREL, Out<ELFT>::RelaPlt->isRela() ? DT_RELA : DT_REL);
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}
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WritePtr(DT_SYMTAB, Out<ELFT>::DynSymTab->getVA());
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WritePtr(DT_SYMENT, sizeof(Elf_Sym));
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@ -171,7 +171,7 @@ class RelocationSection final : public OutputSectionBase<ELFT::Is64Bits> {
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typedef typename llvm::object::ELFFile<ELFT>::uintX_t uintX_t;
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public:
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RelocationSection(StringRef Name, bool IsRela);
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RelocationSection(bool IsRela);
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void addReloc(const DynamicReloc<ELFT> &Reloc) { Relocs.push_back(Reloc); }
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void finalize() override;
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void writeTo(uint8_t *Buf) override;
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@ -289,7 +289,6 @@ template <class ELFT> struct Out {
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static OutputSection<ELFT> *Bss;
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static PltSection<ELFT> *Plt;
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static RelocationSection<ELFT> *RelaDyn;
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static RelocationSection<ELFT> *RelaPlt;
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static StringTableSection<ELFT::Is64Bits> *DynStrTab;
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static StringTableSection<ELFT::Is64Bits> *StrTab;
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static SymbolTableSection<ELFT> *DynSymTab;
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@ -134,11 +134,8 @@ template <class ELFT> static void doWriteResult(SymbolTable *Symtab) {
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Out<ELFT>::DynSymTab = &DynSymTab;
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HashTableSection<ELFT> HashTab;
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Out<ELFT>::HashTab = &HashTab;
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bool IsRela = Symtab->shouldUseRela();
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RelocationSection<ELFT> RelaDyn(IsRela ? ".rela.dyn" : ".rel.dyn", IsRela);
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RelocationSection<ELFT> RelaDyn(Symtab->shouldUseRela());
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Out<ELFT>::RelaDyn = &RelaDyn;
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RelocationSection<ELFT> RelaPlt(IsRela ? ".rela.plt" : ".rel.plt", IsRela);
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Out<ELFT>::RelaPlt = &RelaPlt;
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DynamicSection<ELFT> Dynamic(*Symtab);
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Out<ELFT>::Dynamic = &Dynamic;
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@ -236,15 +233,11 @@ void Writer<ELFT>::scanRelocs(
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Out<ELFT>::Got->addEntry(Body);
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}
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}
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bool CanBePreempted = canBePreempted(Body);
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if (CanBePreempted)
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if (canBePreempted(Body)) {
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Body->setUsedInDynamicReloc();
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if (CanBePreempted || (Config->Shared && !Target->isRelRelative(Type))) {
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if (Body && Body->isInPlt())
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Out<ELFT>::RelaPlt->addReloc({C, RI});
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else
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Out<ELFT>::RelaDyn->addReloc({C, RI});
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Out<ELFT>::RelaDyn->addReloc({C, RI});
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} else if (Config->Shared && !Target->isRelRelative(Type)) {
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Out<ELFT>::RelaDyn->addReloc({C, RI});
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}
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}
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}
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@ -473,8 +466,6 @@ template <class ELFT> void Writer<ELFT>::createSections() {
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OutputSections.push_back(Out<ELFT>::DynStrTab);
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if (Out<ELFT>::RelaDyn->hasRelocs())
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OutputSections.push_back(Out<ELFT>::RelaDyn);
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if (Out<ELFT>::RelaPlt->hasRelocs())
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OutputSections.push_back(Out<ELFT>::RelaPlt);
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}
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if (!Out<ELFT>::Got->empty())
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OutputSections.push_back(Out<ELFT>::Got);
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@ -20,9 +20,9 @@
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// CHECK-NEXT: AddressAlignment: 16
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// CHECK: Relocations [
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// CHECK-NEXT: Section ({{.*}}) .rel.plt {
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// CHECK-NEXT: 0x13058 R_386_GLOB_DAT bar 0x0
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// CHECK-NEXT: 0x1305C R_386_GLOB_DAT zed 0x0
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// CHECK-NEXT: Section ({{.*}}) .rel.dyn {
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// CHECK-NEXT: 0x13050 R_386_GLOB_DAT bar 0x0
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// CHECK-NEXT: 0x13054 R_386_GLOB_DAT zed 0x0
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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@ -38,15 +38,15 @@
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// DISASM-NEXT: 12005: e9 06 00 00 00 jmp 6
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// DISASM-NEXT: 1200a: e9 09 00 00 00 jmp 9
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// 0x13058 = 77912
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// 0x1305C = 77916
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// 0x13050 = 77904
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// 0x13054 = 77908
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// DISASM: Disassembly of section .plt:
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// DISASM-NEXT: .plt:
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// DISASM-NEXT: 12010: ff 25 {{.*}} jmpl *77912
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// DISASM-NEXT: 12010: ff 25 {{.*}} jmpl *77904
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// DISASM-NEXT: 12016: 90 nop
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// DISASM-NEXT: 12017: 90 nop
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// DISASM-NEXT: 12018: ff 25 {{.*}} jmpl *77916
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// DISASM-NEXT: 12018: ff 25 {{.*}} jmpl *77908
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// DISASM-NEXT: 1201e: 90 nop
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// DISASM-NEXT: 1201f: 90 nop
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@ -20,10 +20,10 @@
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// CHECK-NEXT: AddressAlignment: 16
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// CHECK: Relocations [
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// CHECK-NEXT: Section ({{.*}}) .rela.plt {
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// CHECK-NEXT: 0x30B0 R_X86_64_GLOB_DAT bar 0x0
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// CHECK-NEXT: 0x30B8 R_X86_64_GLOB_DAT zed 0x0
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// CHECK-NEXT: 0x30C0 R_X86_64_GLOB_DAT _start 0x0
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// CHECK-NEXT: Section ({{.*}}) .rela.dyn {
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// CHECK-NEXT: 0x30A0 R_X86_64_GLOB_DAT bar 0x0
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// CHECK-NEXT: 0x30A8 R_X86_64_GLOB_DAT zed 0x0
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// CHECK-NEXT: 0x30B0 R_X86_64_GLOB_DAT _start 0x0
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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@ -39,15 +39,15 @@
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// DISASM-NEXT: 2005: e9 {{.*}} jmp 22
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// DISASM-NEXT: 200a: e9 {{.*}} jmp 25
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// 0x30B0 - 0x2026 = 4234
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// 0x30B8 - 0x202e = 4234
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// 0x130A0 - 0x12026 = 4218
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// 0x130A8 - 0x1202e = 4218
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// DISASM: Disassembly of section .plt:
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// DISASM-NEXT: .plt:
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// DISASM-NEXT: 2020: ff 25 {{.*}} jmpq *4234(%rip)
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// DISASM-NEXT: 2020: ff 25 {{.*}} jmpq *4218(%rip)
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// DISASM-NEXT: 2026: 90 nop
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// DISASM-NEXT: 2027: 90 nop
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// DISASM-NEXT: 2028: ff 25 {{.*}} jmpq *4234(%rip)
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// DISASM-NEXT: 2028: ff 25 {{.*}} jmpq *4218(%rip)
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// DISASM-NEXT: 202e: 90 nop
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// DISASM-NEXT: 202f: 90 nop
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@ -22,7 +22,7 @@
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// SEC-NEXT: SHF_ALLOC
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// SEC-NEXT: SHF_WRITE
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// SEC-NEXT: ]
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// SEC-NEXT: Address: 0x130E0
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// SEC-NEXT: Address: 0x130A0
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// SEC-NEXT: Offset:
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// SEC-NEXT: Size: 16
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// SEC-NEXT: Link: 0
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@ -93,7 +93,7 @@ R_X86_64_64:
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R_X86_64_GOTPCREL:
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.long zed@gotpcrel
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// 0x130E8 - 0x11008 = 8416
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// 8416 = 0xE0200000 in little endian
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// 0x130A8 - 0x11008 = 8352
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// 8352 = 0x80200000 in little endian
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// CHECK: Contents of section .R_X86_64_GOTPCREL
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// CHECK-NEXT: 11008 e0200000
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// CHECK-NEXT: 11008 a0200000
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