forked from OSchip/llvm-project
[AArch64] Emit PAC/BTI .note.gnu.property flags
This patch make LLVM emit the processor specific program property types defined in AArch64 ELF spec https://developer.arm.com/docs/ihi0056/f/elf-for-the-arm-64-bit-architecture-aarch64-abi-2019q2-documentation A file containing no functions gets both property flags. Otherwise, a property is set iff all the functions in the file have the corresponding attribute. Patch by Daniel Kiss and Momchil Velikov. Differential Revision: https://reviews.llvm.org/D71019
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@ -84,6 +84,7 @@ public:
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return MCInstLowering.lowerOperand(MO, MCOp);
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}
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void EmitStartOfAsmFile(Module &M) override;
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void EmitJumpTableInfo() override;
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void emitJumpTableEntry(const MachineJumpTableInfo *MJTI,
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const MachineBasicBlock *MBB, unsigned JTI);
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@ -181,6 +182,65 @@ private:
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} // end anonymous namespace
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void AArch64AsmPrinter::EmitStartOfAsmFile(Module &M) {
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if (!TM.getTargetTriple().isOSBinFormatELF())
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return;
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// Assemble feature flags that may require creation of a note section.
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unsigned Flags = ELF::GNU_PROPERTY_AARCH64_FEATURE_1_BTI |
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ELF::GNU_PROPERTY_AARCH64_FEATURE_1_PAC;
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if (any_of(M, [](const Function &F) {
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return !F.isDeclaration() &&
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!F.hasFnAttribute("branch-target-enforcement");
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})) {
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Flags &= ~ELF::GNU_PROPERTY_AARCH64_FEATURE_1_BTI;
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}
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if ((Flags & ELF::GNU_PROPERTY_AARCH64_FEATURE_1_BTI) == 0 &&
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any_of(M, [](const Function &F) {
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return F.hasFnAttribute("branch-target-enforcement");
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})) {
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errs() << "warning: some functions compiled with BTI and some compiled "
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"without BTI\n"
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<< "warning: not setting BTI in feature flags\n";
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}
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if (any_of(M, [](const Function &F) {
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if (F.isDeclaration())
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return false;
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Attribute A = F.getFnAttribute("sign-return-address");
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return !A.isStringAttribute() || A.getValueAsString() == "none";
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})) {
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Flags &= ~ELF::GNU_PROPERTY_AARCH64_FEATURE_1_PAC;
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}
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if (Flags == 0)
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return;
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// Emit a .note.gnu.property section with the flags.
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MCSection *Cur = OutStreamer->getCurrentSectionOnly();
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MCSection *Nt = MMI->getContext().getELFSection(
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".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
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OutStreamer->SwitchSection(Nt);
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// Emit the note header.
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EmitAlignment(Align(8));
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OutStreamer->EmitIntValue(4, 4); // data size for "GNU\0"
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OutStreamer->EmitIntValue(4 * 4, 4); // Elf_Prop size
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OutStreamer->EmitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4);
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OutStreamer->EmitBytes(StringRef("GNU", 4)); // note name
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// Emit the PAC/BTI properties.
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OutStreamer->EmitIntValue(ELF::GNU_PROPERTY_AARCH64_FEATURE_1_AND, 4);
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OutStreamer->EmitIntValue(4, 4); // data size
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OutStreamer->EmitIntValue(Flags, 4); // data
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OutStreamer->EmitIntValue(0, 4); // pad
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OutStreamer->endSection(Nt);
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OutStreamer->SwitchSection(Cur);
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}
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void AArch64AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)
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{
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EmitSled(MI, SledKind::FUNCTION_ENTER);
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@ -0,0 +1,14 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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@x = common dso_local global i32 0, align 4
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attributes #0 = { "branch-target-enforcement" }
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; Both attributes present in a file with no functions.
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 3
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; OBJ: Properties: aarch64 feature: BTI, PAC
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@ -0,0 +1,18 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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attributes #0 = { "branch-target-enforcement" }
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; BTI attribute present
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 1
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; OBJ: Properties: aarch64 feature: BTI
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@ -0,0 +1,18 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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attributes #0 = { "sign-return-address"="all" }
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; PAC attribute present
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 2
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; OBJ: Properties: aarch64 feature: PAC
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@ -0,0 +1,18 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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attributes #0 = { "branch-target-enforcement" "sign-return-address"="non-leaf" }
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; Both attribute present
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 3
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; OBJ: Properties: aarch64 feature: BTI, PAC
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@ -0,0 +1,25 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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define dso_local i32 @g() #1 {
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entry:
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ret i32 0
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}
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attributes #0 = { "branch-target-enforcement" "sign-return-address"="non-leaf" }
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attributes #1 = { "branch-target-enforcement" }
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; Only the common atttribute (BTI)
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 1
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; OBJ: Properties: aarch64 feature: BTI
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@ -0,0 +1,26 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - 2>&1 | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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define dso_local i32 @g() #1 {
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entry:
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ret i32 0
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}
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attributes #0 = { "branch-target-enforcement" "sign-return-address"="non-leaf" }
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attributes #1 = { "sign-return-address"="all" }
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; Only the common atttribute (PAC)
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; ASM: warning: not setting BTI in feature flags
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 2
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; OBJ: Properties: aarch64 feature: PAC
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@ -0,0 +1,22 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf -S | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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define dso_local i32 @g() #1 {
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entry:
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ret i32 0
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}
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attributes #0 = { "sign-return-address"="non-leaf" }
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attributes #1 = { "sign-return-address"="none" }
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; No common attribute, no note section
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; ASM-NOT: .note.gnu.property
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; OBJ-NOT: .note.gnu.property
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@ -0,0 +1,23 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - 2>&1 | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf -S | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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ret i32 0
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}
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define dso_local i32 @g() #1 {
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entry:
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ret i32 0
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}
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attributes #0 = { "sign-return-address"="non-leaf" }
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attributes #1 = { "branch-target-enforcement" }
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; No common attribute, no note section
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; ASM: warning: not setting BTI in feature flags
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; ASM-NOT: .note.gnu.property
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; OBJ-NOT: .note.gnu.property
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@ -0,0 +1,21 @@
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; RUN: llc -mtriple=aarch64-linux %s -o - | \
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; RUN: FileCheck %s --check-prefix=ASM
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; RUN: llc -mtriple=aarch64-linux %s -filetype=obj -o - | \
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; RUN: llvm-readelf --notes | FileCheck %s --check-prefix=OBJ
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define dso_local i32 @f() #0 {
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entry:
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%r = tail call i32 @g()
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ret i32 %r
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}
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declare dso_local i32 @g()
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attributes #0 = { "branch-target-enforcement" }
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; Declarations don't prevent setting BTI
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; ASM: .word 3221225472
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; ASM-NEXT: .word 4
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; ASM-NEXT .word 1
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; OBJ: Properties: aarch64 feature: BTI
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