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Fix the testcase. We do expect two vblendw on XMMs. 

llvm-svn: 155477
This commit is contained in:
Nadav Rotem 2012-04-24 19:57:38 +00:00
parent edef71790b
commit d50c3b2c57
1 changed files with 6 additions and 5 deletions
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11
llvm/test/CodeGen/X86/avx2-shuffle.ll
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@ -1,13 +1,14 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s
; Make sure that we don't match this shuffle using the vpblendw instruction.
; The mask for the vpblendw instruction needs to be identical for both halves
; of the YMM.
; Make sure that we don't match this shuffle using the vpblendw YMM instruction.
; The mask for the vpblendw instruction needs to be identical for both halves
; of the YMM. Need to use two vpblendw instructions.
; CHECK: blendw1
; CHECK-NOT: vpblendw
; CHECK: vpblendw
; CHECK: vpblendw
; CHECK: ret
define <16 x i16> @blendw1(<16 x i16> %a, <16 x i16> %b) nounwind alwaysinline {
%t = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 17, i32 18, i32 3, i32 20, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%t = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 17, i32 18, i32 3, i32 20, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 31>
ret <16 x i16> %t
}