forked from OSchip/llvm-project
parent
238fa76574
commit
d4ea94eb94
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@ -241,14 +241,15 @@ define i32 @test12a(i1 %cond, i32 %a) {
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}
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define i32 @test12b(i1 %cond, i32 %a) {
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%b = ashr i32 %a, 1
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%c = select i1 %cond, i32 %a, i32 %b
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ret i32 %c
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; CHECK-LABEL: @test12b(
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; CHECK: zext i1 %cond to i32
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; CHECK: %b = xor i32
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; CHECK: %c = ashr i32 %a, %b
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; CHECK: ret i32 %c
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; CHECK-NEXT: [[TMP1:%.*]] = zext i1 %cond to i32
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; CHECK-NEXT: [[B:%.*]] = xor i32 [[TMP1]], 1
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; CHECK-NEXT: [[D:%.*]] = ashr i32 %a, [[B]]
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; CHECK-NEXT: ret i32 [[D]]
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;
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%b = ashr i32 %a, 1
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%d = select i1 %cond, i32 %a, i32 %b
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ret i32 %d
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}
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define i32 @test13(i32 %a, i32 %b) {
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@ -1189,10 +1190,14 @@ define i64 @select_icmp_x_and_8_ne_0_y_xor_8(i32 %x, i64 %y) {
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ret i64 %xor.y
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}
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8(
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; CHECK: xor i64 %1, 8
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; CHECK: or i64 %2, %y
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define i64 @select_icmp_x_and_8_ne_0_y_or_8(i32 %x, i64 %y) {
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; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y_or_8(
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; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 8
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[AND]] to i64
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; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 8
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; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[TMP2]], %y
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; CHECK-NEXT: ret i64 [[TMP3]]
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;
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%and = and i32 %x, 8
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%cmp = icmp eq i32 %and, 0
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%or = or i64 %y, 8
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