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Migrate PPCAsmPrinter's subtarget from reference to pointer in 

preparation for making it MachineFunction dependent.

llvm-svn: 228638
This commit is contained in:
Eric Christopher 2015-02-10 00:44:17 +00:00
parent b96afab184
commit d49868080e
1 changed files with 49 additions and 48 deletions
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97
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
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@ -68,15 +68,15 @@ namespace {
class PPCAsmPrinter : public AsmPrinter { class PPCAsmPrinter : public AsmPrinter {
protected: protected:
MapVector<MCSymbol*, MCSymbol*> TOC; MapVector<MCSymbol*, MCSymbol*> TOC;
const PPCSubtarget &Subtarget; const PPCSubtarget *Subtarget;
uint64_t TOCLabelID; uint64_t TOCLabelID;
StackMaps SM; StackMaps SM;
public: public:
explicit PPCAsmPrinter(TargetMachine &TM, explicit PPCAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer) std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), : AsmPrinter(TM, std::move(Streamer)),
Subtarget(TM.getSubtarget<PPCSubtarget>()), TOCLabelID(0), SM(*this) { Subtarget(&TM.getSubtarget<PPCSubtarget>()), TOCLabelID(0),
} SM(*this) {}
const char *getPassName() const override { const char *getPassName() const override {
return "PowerPC Assembly Printer"; return "PowerPC Assembly Printer";
@ -168,7 +168,8 @@ void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
// Linux assembler (Others?) does not take register mnemonics. // Linux assembler (Others?) does not take register mnemonics.
// FIXME - What about special registers used in mfspr/mtspr? // FIXME - What about special registers used in mfspr/mtspr?
if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName); if (!Subtarget->isDarwin())
RegName = stripRegisterPrefix(RegName);
O << RegName; O << RegName;
return; return;
} }
@ -283,7 +284,8 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
case 'y': // A memory reference for an X-form instruction case 'y': // A memory reference for an X-form instruction
{ {
const char *RegName = "r0"; const char *RegName = "r0";
if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName); if (!Subtarget->isDarwin())
RegName = stripRegisterPrefix(RegName);
O << RegName << ", "; O << RegName << ", ";
printOperand(MI, OpNo, O); printOperand(MI, OpNo, O);
return false; return false;
@ -409,7 +411,7 @@ void PPCAsmPrinter::LowerPATCHPOINT(MCStreamer &OutStreamer, StackMaps &SM,
/// ///
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) { void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
MCInst TmpInst; MCInst TmpInst;
bool isPPC64 = Subtarget.isPPC64(); bool isPPC64 = Subtarget->isPPC64();
bool isDarwin = Triple(TM.getTargetTriple()).isOSDarwin(); bool isDarwin = Triple(TM.getTargetTriple()).isOSDarwin();
const Module *M = MF->getFunction()->getParent(); const Module *M = MF->getFunction()->getParent();
PICLevel::Level PL = M->getPICLevel(); PICLevel::Level PL = M->getPICLevel();
@ -694,7 +696,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::ADDISgotTprelHA: { case PPC::ADDISgotTprelHA: {
// Transform: %Xd = ADDISgotTprelHA %X2, <ga:@sym> // Transform: %Xd = ADDISgotTprelHA %X2, <ga:@sym>
// Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha
assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);
const GlobalValue *GValue = MO.getGlobal(); const GlobalValue *GValue = MO.getGlobal();
MCSymbol *MOSymbol = getSymbol(GValue); MCSymbol *MOSymbol = getSymbol(GValue);
@ -773,7 +775,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::ADDIStlsgdHA: { case PPC::ADDIStlsgdHA: {
// Transform: %Xd = ADDIStlsgdHA %X2, <ga:@sym> // Transform: %Xd = ADDIStlsgdHA %X2, <ga:@sym>
// Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha
assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);
const GlobalValue *GValue = MO.getGlobal(); const GlobalValue *GValue = MO.getGlobal();
MCSymbol *MOSymbol = getSymbol(GValue); MCSymbol *MOSymbol = getSymbol(GValue);
@ -795,13 +797,12 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);
const GlobalValue *GValue = MO.getGlobal(); const GlobalValue *GValue = MO.getGlobal();
MCSymbol *MOSymbol = getSymbol(GValue); MCSymbol *MOSymbol = getSymbol(GValue);
const MCExpr *SymGotTlsGD = const MCExpr *SymGotTlsGD = MCSymbolRefExpr::Create(
MCSymbolRefExpr::Create(MOSymbol, Subtarget.isPPC64() ? MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO : : MCSymbolRefExpr::VK_PPC_GOT_TLSGD,
MCSymbolRefExpr::VK_PPC_GOT_TLSGD, OutContext);
OutContext);
EmitToStreamer(OutStreamer, EmitToStreamer(OutStreamer,
MCInstBuilder(Subtarget.isPPC64() ? PPC::ADDI8 : PPC::ADDI) MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
.addReg(MI->getOperand(0).getReg()) .addReg(MI->getOperand(0).getReg())
.addReg(MI->getOperand(1).getReg()) .addReg(MI->getOperand(1).getReg())
.addExpr(SymGotTlsGD)); .addExpr(SymGotTlsGD));
@ -810,7 +811,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
case PPC::ADDIStlsldHA: { case PPC::ADDIStlsldHA: {
// Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym> // Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym>
// Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha // Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha
assert(Subtarget.isPPC64() && "Not supported for 32-bit PowerPC"); assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);
const GlobalValue *GValue = MO.getGlobal(); const GlobalValue *GValue = MO.getGlobal();
MCSymbol *MOSymbol = getSymbol(GValue); MCSymbol *MOSymbol = getSymbol(GValue);
@ -832,16 +833,15 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MO = MI->getOperand(2); const MachineOperand &MO = MI->getOperand(2);
const GlobalValue *GValue = MO.getGlobal(); const GlobalValue *GValue = MO.getGlobal();
MCSymbol *MOSymbol = getSymbol(GValue); MCSymbol *MOSymbol = getSymbol(GValue);
const MCExpr *SymGotTlsLD = const MCExpr *SymGotTlsLD = MCSymbolRefExpr::Create(
MCSymbolRefExpr::Create(MOSymbol, Subtarget.isPPC64() ? MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO : : MCSymbolRefExpr::VK_PPC_GOT_TLSLD,
MCSymbolRefExpr::VK_PPC_GOT_TLSLD, OutContext);
OutContext);
EmitToStreamer(OutStreamer, EmitToStreamer(OutStreamer,
MCInstBuilder(Subtarget.isPPC64() ? PPC::ADDI8 : PPC::ADDI) MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
.addReg(MI->getOperand(0).getReg()) .addReg(MI->getOperand(0).getReg())
.addReg(MI->getOperand(1).getReg()) .addReg(MI->getOperand(1).getReg())
.addExpr(SymGotTlsLD)); .addExpr(SymGotTlsLD));
return; return;
} }
case PPC::ADDISdtprelHA: case PPC::ADDISdtprelHA:
@ -856,11 +856,12 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MCExpr *SymDtprel = const MCExpr *SymDtprel =
MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA, MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_HA,
OutContext); OutContext);
EmitToStreamer(OutStreamer, EmitToStreamer(
MCInstBuilder(Subtarget.isPPC64() ? PPC::ADDIS8 : PPC::ADDIS) OutStreamer,
.addReg(MI->getOperand(0).getReg()) MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS)
.addReg(Subtarget.isPPC64() ? PPC::X3 : PPC::R3) .addReg(MI->getOperand(0).getReg())
.addExpr(SymDtprel)); .addReg(Subtarget->isPPC64() ? PPC::X3 : PPC::R3)
.addExpr(SymDtprel));
return; return;
} }
case PPC::ADDIdtprelL: case PPC::ADDIdtprelL:
@ -876,15 +877,15 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO, MCSymbolRefExpr::Create(MOSymbol, MCSymbolRefExpr::VK_PPC_DTPREL_LO,
OutContext); OutContext);
EmitToStreamer(OutStreamer, EmitToStreamer(OutStreamer,
MCInstBuilder(Subtarget.isPPC64() ? PPC::ADDI8 : PPC::ADDI) MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
.addReg(MI->getOperand(0).getReg()) .addReg(MI->getOperand(0).getReg())
.addReg(MI->getOperand(1).getReg()) .addReg(MI->getOperand(1).getReg())
.addExpr(SymDtprel)); .addExpr(SymDtprel));
return; return;
} }
case PPC::MFOCRF: case PPC::MFOCRF:
case PPC::MFOCRF8: case PPC::MFOCRF8:
if (!Subtarget.hasMFOCRF()) { if (!Subtarget->hasMFOCRF()) {
// Transform: %R3 = MFOCRF %CR7 // Transform: %R3 = MFOCRF %CR7
// Into: %R3 = MFCR ;; cr7 // Into: %R3 = MFCR ;; cr7
unsigned NewOpcode = unsigned NewOpcode =
@ -898,7 +899,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
break; break;
case PPC::MTOCRF: case PPC::MTOCRF:
case PPC::MTOCRF8: case PPC::MTOCRF8:
if (!Subtarget.hasMFOCRF()) { if (!Subtarget->hasMFOCRF()) {
// Transform: %CR7 = MTOCRF %R3 // Transform: %CR7 = MTOCRF %R3
// Into: MTCRF mask, %R3 ;; cr7 // Into: MTCRF mask, %R3 ;; cr7
unsigned NewOpcode = unsigned NewOpcode =
@ -923,7 +924,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// suite shows a handful of test cases that fail this check for // suite shows a handful of test cases that fail this check for
// Darwin. Those need to be investigated before this sanity test // Darwin. Those need to be investigated before this sanity test
// can be enabled for those subtargets. // can be enabled for those subtargets.
if (!Subtarget.isDarwin()) { if (!Subtarget->isDarwin()) {
unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
const MachineOperand &MO = MI->getOperand(OpNum); const MachineOperand &MO = MI->getOperand(OpNum);
if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
@ -939,7 +940,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} }
void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) { void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
if (Subtarget.isELFv2ABI()) { if (Subtarget->isELFv2ABI()) {
PPCTargetStreamer *TS = PPCTargetStreamer *TS =
static_cast<PPCTargetStreamer *>(OutStreamer.getTargetStreamer()); static_cast<PPCTargetStreamer *>(OutStreamer.getTargetStreamer());
@ -947,7 +948,7 @@ void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
TS->emitAbiVersion(2); TS->emitAbiVersion(2);
} }
if (Subtarget.isPPC64() || TM.getRelocationModel() != Reloc::PIC_) if (Subtarget->isPPC64() || TM.getRelocationModel() != Reloc::PIC_)
return AsmPrinter::EmitStartOfAsmFile(M); return AsmPrinter::EmitStartOfAsmFile(M);
if (M.getPICLevel() == PICLevel::Small) if (M.getPICLevel() == PICLevel::Small)
@ -975,12 +976,12 @@ void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() { void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
// linux/ppc32 - Normal entry label. // linux/ppc32 - Normal entry label.
if (!Subtarget.isPPC64() && if (!Subtarget->isPPC64() &&
(TM.getRelocationModel() != Reloc::PIC_ || (TM.getRelocationModel() != Reloc::PIC_ ||
MF->getFunction()->getParent()->getPICLevel() == PICLevel::Small)) MF->getFunction()->getParent()->getPICLevel() == PICLevel::Small))
return AsmPrinter::EmitFunctionEntryLabel(); return AsmPrinter::EmitFunctionEntryLabel();
if (!Subtarget.isPPC64()) { if (!Subtarget->isPPC64()) {
const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>(); const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
if (PPCFI->usesPICBase()) { if (PPCFI->usesPICBase()) {
MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
@ -1001,7 +1002,7 @@ void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
} }
// ELFv2 ABI - Normal entry label. // ELFv2 ABI - Normal entry label.
if (Subtarget.isELFv2ABI()) if (Subtarget->isELFv2ABI())
return AsmPrinter::EmitFunctionEntryLabel(); return AsmPrinter::EmitFunctionEntryLabel();
// Emit an official procedure descriptor. // Emit an official procedure descriptor.
@ -1103,7 +1104,7 @@ void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
// //
// This ensures we have r2 set up correctly while executing the function // This ensures we have r2 set up correctly while executing the function
// body, no matter which entry point is called. // body, no matter which entry point is called.
if (Subtarget.isELFv2ABI() if (Subtarget->isELFv2ABI()
// Only do all that if the function uses r2 in the first place. // Only do all that if the function uses r2 in the first place.
&& !MF->getRegInfo().use_empty(PPC::X2)) { && !MF->getRegInfo().use_empty(PPC::X2)) {
@ -1158,7 +1159,7 @@ void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
// FIXME: We should fill in the eight-byte mandatory fields as described in // FIXME: We should fill in the eight-byte mandatory fields as described in
// the PPC64 ELF ABI (this is a low-priority item because GDB does not // the PPC64 ELF ABI (this is a low-priority item because GDB does not
// currently make use of these fields). // currently make use of these fields).
if (Subtarget.isPPC64()) { if (Subtarget->isPPC64()) {
OutStreamer.EmitIntValue(0, 4/*size*/); OutStreamer.EmitIntValue(0, 4/*size*/);
OutStreamer.EmitIntValue(0, 8/*size*/); OutStreamer.EmitIntValue(0, 8/*size*/);
} }
@ -1189,12 +1190,12 @@ void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
"ppc64le" "ppc64le"
}; };
unsigned Directive = Subtarget.getDarwinDirective(); unsigned Directive = Subtarget->getDarwinDirective();
if (Subtarget.hasMFOCRF() && Directive < PPC::DIR_970) if (Subtarget->hasMFOCRF() && Directive < PPC::DIR_970)
Directive = PPC::DIR_970; Directive = PPC::DIR_970;
if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400) if (Subtarget->hasAltivec() && Directive < PPC::DIR_7400)
Directive = PPC::DIR_7400; Directive = PPC::DIR_7400;
if (Subtarget.isPPC64() && Directive < PPC::DIR_64) if (Subtarget->isPPC64() && Directive < PPC::DIR_64)
Directive = PPC::DIR_64; Directive = PPC::DIR_64;
assert(Directive <= PPC::DIR_64 && "Directive out of range."); assert(Directive <= PPC::DIR_64 && "Directive out of range.");
@ -1239,7 +1240,7 @@ static MCSymbol *GetAnonSym(MCSymbol *Sym, MCContext &Ctx) {
void PPCDarwinAsmPrinter:: void PPCDarwinAsmPrinter::
EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) { EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) {
bool isPPC64 = TM.getDataLayout()->getPointerSizeInBits() == 64; bool isPPC64 = TM.getDataLayout()->getPointerSizeInBits() == 64;
bool isDarwin = Subtarget.isDarwin(); bool isDarwin = Subtarget->isDarwin();
const TargetLoweringObjectFileMachO &TLOFMacho = const TargetLoweringObjectFileMachO &TLOFMacho =
static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering()); static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());