From d496355b53fd1daf983c1bc75cafc9a9d673b7a0 Mon Sep 17 00:00:00 2001
From: Tim Northover <tnorthover@apple.com>
Date: Wed, 19 Feb 2014 10:32:40 +0000
Subject: [PATCH] Try addding datalayout in case that's what Hexagon doesn't
 like.

Just a wild stab in the dark really, but in the absence of any ability to
reproduce the problem...

llvm-svn: 201658
---
 llvm/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/llvm/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll b/llvm/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
index c4ee79cd7fb2..e945b03c33ae 100644
--- a/llvm/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
+++ b/llvm/test/Transforms/CodeGenPrepare/x86-shuffle-sink.ll
@@ -1,5 +1,8 @@
-; RUN: opt -S -codegenprepare -mtriple=x86_64-apple-macosx10.9 -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
-; RUN: opt -S -codegenprepare -mtriple=x86_64-apple-macosx10.9 -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
+; RUN: opt -S -codegenprepare -mcpu=core-avx2 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
+; RUN: opt -S -codegenprepare -mcpu=corei7 %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-SSE2
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-darwin10.9.0"
 
 define <16 x i8> @test_8bit(<16 x i8> %lhs, <16 x i8> %tmp, i1 %tst) {
 ; CHECK-LABEL: @test_8bit