forked from OSchip/llvm-project
[SCEV] Add test cases where the max BTC is imprecise, due to step != 1.
Add a test case where we fail to compute a tight max backedge taken count, due to the step being != 1. This is part of the issue with PR40961.
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@ -135,6 +135,28 @@ exit:
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ret void
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}
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define void @test_guard_ule_12_step2(i32* nocapture %a, i64 %N) {
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; CHECK-LABEL: Determining loop execution counts for: @test_guard_ule_12_step2
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; CHECK-NEXT: Loop %loop: backedge-taken count is (%N /u 2)
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; CHECK-NEXT: Loop %loop: max backedge-taken count is 9223372036854775807
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; CHECK-NEXT: Loop %loop: Predicated backedge-taken count is (%N /u 2)
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;
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entry:
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%c.1 = icmp ule i64 %N, 12
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br i1 %c.1, label %loop, label %exit
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loop:
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%iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ]
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%idx = getelementptr inbounds i32, i32* %a, i64 %iv
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store i32 1, i32* %idx, align 4
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%iv.next = add nuw nsw i64 %iv, 2
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%exitcond = icmp eq i64 %iv, %N
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br i1 %exitcond, label %exit, label %loop
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exit:
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ret void
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}
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define void @test_multiple_const_guards_order1(i32* nocapture %a, i64 %i) {
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; CHECK-LABEL: @test_multiple_const_guards_order1
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; CHECK: Loop %loop: backedge-taken count is %i
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