forked from OSchip/llvm-project
Finegrainify namespacification
Minor cleanups to killer pass llvm-svn: 10555
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@ -25,8 +25,7 @@
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#include "Support/Statistic.h"
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#include "Support/Statistic.h"
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#include <algorithm>
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#include <algorithm>
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#include <iostream>
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#include <iostream>
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using namespace llvm;
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namespace llvm {
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namespace {
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namespace {
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Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
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Statistic<> NumFXCH("x86-codegen", "Number of fxch instructions inserted");
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@ -127,7 +126,7 @@ namespace {
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};
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};
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}
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}
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FunctionPass *createX86FloatingPointStackifierPass() { return new FPS(); }
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FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
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/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
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/// runOnMachineFunction - Loop over all of the basic blocks, transforming FP
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/// register references into FP stack references.
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/// register references into FP stack references.
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@ -226,12 +225,14 @@ bool FPS::processBasicBlock(MachineFunction &MF, MachineBasicBlock &BB) {
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// Efficient Lookup Table Support
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// Efficient Lookup Table Support
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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struct TableEntry {
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namespace {
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unsigned from;
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struct TableEntry {
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unsigned to;
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unsigned from;
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bool operator<(const TableEntry &TE) const { return from < TE.from; }
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unsigned to;
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bool operator<(unsigned V) const { return from < V; }
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bool operator<(const TableEntry &TE) const { return from < TE.from; }
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};
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bool operator<(unsigned V) const { return from < V; }
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};
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}
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static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
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static bool TableIsSorted(const TableEntry *Table, unsigned NumEntries) {
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for (unsigned i = 0; i != NumEntries-1; ++i)
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for (unsigned i = 0; i != NumEntries-1; ++i)
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@ -603,7 +604,6 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
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}
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}
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namespace {
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namespace {
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struct FPK : public MachineFunctionPass {
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struct FPK : public MachineFunctionPass {
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virtual const char *getPassName() const { return "X86 FP Killer"; }
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virtual const char *getPassName() const { return "X86 FP Killer"; }
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual bool runOnMachineFunction(MachineFunction &MF);
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@ -617,20 +617,20 @@ namespace {
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};
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};
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}
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}
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FunctionPass * createX86FloatingPointKillerPass() { return new FPK(); }
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FunctionPass *llvm::createX86FloatingPointKillerPass() { return new FPK(); }
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bool FPK::runOnMachineFunction(MachineFunction &MF)
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bool FPK::runOnMachineFunction(MachineFunction &MF) {
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{
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const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
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const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
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LiveVariables &LV = getAnalysis<LiveVariables>();
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for (MachineFunction::iterator
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for (MachineFunction::iterator
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mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
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mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
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MachineBasicBlock& mbb = *mbbi;
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MachineBasicBlock& mbb = *mbbi;
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MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
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MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
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// rewind to the last non terminating instruction
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// rewind to the last non terminating instruction
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while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode())) {
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while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode()))
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++mii;
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++mii;
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}
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// add implicit def for all virtual floating point registers so that
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// add implicit def for all virtual floating point registers so that
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// they are spilled at the end of each basic block, since our
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// they are spilled at the end of each basic block, since our
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// register stackifier doesn't handle them otherwise.
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// register stackifier doesn't handle them otherwise.
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@ -644,14 +644,13 @@ bool FPK::runOnMachineFunction(MachineFunction &MF)
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.addReg(X86::FP0, MOTy::Def);
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.addReg(X86::FP0, MOTy::Def);
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mbb.insert(mii.base(), instr);
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mbb.insert(mii.base(), instr);
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LiveVariables& lv = getAnalysis<LiveVariables>();
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for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
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for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
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lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
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LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
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// force live variables to compute that these registers are dead
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lv.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
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// force live variables to compute that these registers are dead
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LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
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}
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}
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}
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}
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return true;
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return true;
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}
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}
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} // End llvm namespace
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