forked from OSchip/llvm-project
[ELF][AArch64] Support for movz, movk tprel relocations
This patch Implements the R_AARCH64_TLSLE_MOVW_TPREL_G*[_NC]. These are logically the same calculation as the existing TLSLE relocations with the result written back to mov[nz] and movk instructions. A typical code sequence is: movz x0, #:tprel_g2:foo // bits [47:32] of R_TLS with overflow check movk x0, #:tprel_g1_nc:foo // bits [31:16] of R_TLS with no overflow check movk x0, #:tprel_g0_nc:foo // bits [15:0] of R_TLS with no overflow check This type of code sequence is usually used with a large code model. Differential Revision: https://reviews.llvm.org/D65882 Fixes: PR42853 llvm-svn: 368293
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@ -90,6 +90,11 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
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case R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC:
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case R_AARCH64_TLSLE_MOVW_TPREL_G0:
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case R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
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case R_AARCH64_TLSLE_MOVW_TPREL_G1:
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case R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
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case R_AARCH64_TLSLE_MOVW_TPREL_G2:
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return R_TLS;
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case R_AARCH64_CALL26:
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case R_AARCH64_CONDBR19:
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@ -376,20 +381,25 @@ void AArch64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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break;
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case R_AARCH64_MOVW_PREL_G0:
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case R_AARCH64_MOVW_SABS_G0:
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case R_AARCH64_TLSLE_MOVW_TPREL_G0:
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checkInt(loc, val, 17, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G0_NC:
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case R_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
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writeSMovWImm(loc, val);
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break;
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case R_AARCH64_MOVW_PREL_G1:
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case R_AARCH64_MOVW_SABS_G1:
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case R_AARCH64_TLSLE_MOVW_TPREL_G1:
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checkInt(loc, val, 33, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G1_NC:
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case R_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
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writeSMovWImm(loc, val >> 16);
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break;
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case R_AARCH64_MOVW_PREL_G2:
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case R_AARCH64_MOVW_SABS_G2:
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case R_AARCH64_TLSLE_MOVW_TPREL_G2:
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checkInt(loc, val, 49, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G2_NC:
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@ -34,3 +34,22 @@ movn x0, #:prel_g0:.-0x10001
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movn x0, #:prel_g1:.-0x100010000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G2 out of range: -281479271677952 is not in [-281474976710656, 281474976710655]
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movn x0, #:prel_g2:.-0x1000100000000
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movz x0, #:tprel_g0: v1
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# CHECK: relocation R_AARCH64_TLSLE_MOVW_TPREL_G0 out of range: 65552 is not in [-65536, 65535]
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movz x0, #:tprel_g1: v2
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# CHECK: relocation R_AARCH64_TLSLE_MOVW_TPREL_G1 out of range: 4295032848 is not in [-4294967296, 4294967295]
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movz x0, #:tprel_g2: v3
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# CHECK: relocation R_AARCH64_TLSLE_MOVW_TPREL_G2 out of range: 281479271743496 is not in [-281474976710656, 281474976710655]
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.section .tbss,"awT",@nobits
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.balign 16
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.space 0x10000
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v1:
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.quad 0
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.space 0x100000000 - 8
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v2:
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.quad 0
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.space 0x1000000000000 - 16
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v3:
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.quad 0
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@ -0,0 +1,65 @@
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# REQUIRES: aarch64
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# RUN: llvm-mc -filetype=obj -triple=aarch64-linux-gnu %s -o %t.o
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# RUN: ld.lld %t.o -o %t
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# RUN: llvm-objdump -d %t
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# RUN: llvm-readobj --symbols %t
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# RUN: llvm-objdump --no-show-raw-insn -d %t | FileCheck %s
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# RUN: llvm-readobj --symbols %t | FileCheck --check-prefix=CHECK-SYM %s
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## Test the the local exec relocations that map to:
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## R_AARCH64_TLSLE_MOVW_TPREL_G2
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## R_AARCH64_TLSLE_MOVW_TPREL_G1
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## R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
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## R_AARCH64_TLSLE_MOVW_TPREL_G0
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## R_AARCH64_TLSLE_MOVW_TPREL_G0_NC
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## They calculate the same value as the other TPREL relocations, namely the
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## offset from the thread pointer TP. The G0, G1 and G2 refer to partitions
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## of the result with G2 bits [47:32], G1 bits [31:16] and G0 bits [15:0]
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## the NC variant does not check for overflow.
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## In AArch64 the structure of the TLS at runtime is:
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## | TCB | Alignment Padding | TLS Block |
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## With TP pointing to the start of the TCB. All offsets will be positive.
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.text
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## Access variable in first partition
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movz x0, #:tprel_g0:v0
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## TCB + 0 == 16
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# CHECK: mov x0, #16
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# CHECK-SYM: Name: v0
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# CHECK-SYM-NEXT: Value: 0x0
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## Access variable in second partition
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movz x0, #:tprel_g1:v1
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movk x0, #:tprel_g0_nc:v1
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## TCB + 65536 across movz and movk
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# CHECK-NEXT: mov x0, #65536
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# CHECK-NEXT: movk x0, #16
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# CHECK-SYM: Name: v1
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# CHECK-SYM-NEXT: Value: 0x10000
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## Access variable in third partition
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movz x0, #:tprel_g2:v2
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movk x0, #:tprel_g1_nc:v2
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movk x0, #:tprel_g0_nc:v2
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## TCB + 65536 + 4294967296 across movz and 2 movk instructions
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# CHECK-NEXT: mov x0, #4294967296
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# CHECK-NEXT: movk x0, #1, lsl #16
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# CHECK-NEXT: movk x0, #16
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# CHECK-SYM: Name: v2
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# CHECK-SYM-NEXT: Value: 0x100010000
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.section .tbss,"awT",@nobits
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.balign 16
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v0:
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.quad 0
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.space 0x10000 - 8
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v1:
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.quad 0
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.space 0x100000000 - 8
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v2:
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.quad 0
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