forked from OSchip/llvm-project
[GlobalISel][AArch64] Lower G_FMAD
Noticed this falling back on CTMark at -Os (bullet). Seems like we have no 1:1 matching for it, so match SDAG and just lower. Add testcases for common legal cases as well. Differential Revision: https://reviews.llvm.org/D135111
This commit is contained in:
Jessica Paquette
parent
fdadb5c146
commit
d46751a572
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@ -824,6 +824,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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// TODO: s16 support.
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getActionDefinitionsBuilder(G_FCOPYSIGN).customFor({{s32, s32}, {s64, s64}});
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getActionDefinitionsBuilder(G_FMAD).lower();
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getLegacyLegalizerInfo().computeTables();
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verify(*ST.getInstrInfo());
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}
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@ -0,0 +1,148 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -verify-machineinstrs -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
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...
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---
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name: s16
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $h0, $h1, $h2
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; CHECK-LABEL: name: s16
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; CHECK: liveins: $h0, $h1, $h2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(s16) = COPY $h0
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; CHECK-NEXT: %op1:_(s16) = COPY $h1
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; CHECK-NEXT: %op2:_(s16) = COPY $h2
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; CHECK-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT %op0(s16)
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; CHECK-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT %op1(s16)
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL [[FPEXT]], [[FPEXT1]]
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; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMUL]](s32)
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; CHECK-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[FPTRUNC]](s16)
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; CHECK-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT %op2(s16)
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; CHECK-NEXT: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[FPEXT2]], [[FPEXT3]]
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; CHECK-NEXT: %fmad:_(s16) = G_FPTRUNC [[FADD]](s32)
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; CHECK-NEXT: $h0 = COPY %fmad(s16)
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; CHECK-NEXT: RET_ReallyLR implicit $h0
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%op0:_(s16) = COPY $h0
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%op1:_(s16) = COPY $h1
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%op2:_(s16) = COPY $h2
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%fmad:_(s16) = G_FMAD %op0, %op1, %op2
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$h0 = COPY %fmad
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RET_ReallyLR implicit $h0
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...
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---
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name: s32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $s0, $s1, $s2
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; CHECK-LABEL: name: s32
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; CHECK: liveins: $s0, $s1, $s2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(s32) = COPY $s0
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; CHECK-NEXT: %op1:_(s32) = COPY $s1
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; CHECK-NEXT: %op2:_(s32) = COPY $s2
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s32) = G_FMUL %op0, %op1
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; CHECK-NEXT: %fmad:_(s32) = G_FADD [[FMUL]], %op2
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; CHECK-NEXT: $s0 = COPY %fmad(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $s0
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%op0:_(s32) = COPY $s0
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%op1:_(s32) = COPY $s1
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%op2:_(s32) = COPY $s2
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%fmad:_(s32) = G_FMAD %op0, %op1, %op2
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$s0 = COPY %fmad
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RET_ReallyLR implicit $s0
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...
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---
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name: s64
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1, $d2
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; CHECK-LABEL: name: s64
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; CHECK: liveins: $d0, $d1, $d2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(s64) = COPY $d0
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; CHECK-NEXT: %op1:_(s64) = COPY $d1
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; CHECK-NEXT: %op2:_(s64) = COPY $d2
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(s64) = G_FMUL %op0, %op1
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; CHECK-NEXT: %fmad:_(s64) = G_FADD [[FMUL]], %op2
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; CHECK-NEXT: $d0 = COPY %fmad(s64)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%op0:_(s64) = COPY $d0
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%op1:_(s64) = COPY $d1
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%op2:_(s64) = COPY $d2
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%fmad:_(s64) = G_FMAD %op0, %op1, %op2
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$d0 = COPY %fmad
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RET_ReallyLR implicit $d0
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...
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---
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name: v2s32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1, $d2
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; CHECK-LABEL: name: v2s32
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; CHECK: liveins: $d0, $d1, $d2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(<2 x s32>) = COPY $d0
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; CHECK-NEXT: %op1:_(<2 x s32>) = COPY $d1
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; CHECK-NEXT: %op2:_(<2 x s32>) = COPY $d2
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s32>) = G_FMUL %op0, %op1
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; CHECK-NEXT: %fmad:_(<2 x s32>) = G_FADD [[FMUL]], %op2
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; CHECK-NEXT: $d0 = COPY %fmad(<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%op0:_(<2 x s32>) = COPY $d0
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%op1:_(<2 x s32>) = COPY $d1
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%op2:_(<2 x s32>) = COPY $d2
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%fmad:_(<2 x s32>) = G_FMAD %op0, %op1, %op2
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$d0 = COPY %fmad
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RET_ReallyLR implicit $d0
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...
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---
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name: v4s32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $q0, $q1, $q2
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; CHECK-LABEL: name: v4s32
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; CHECK: liveins: $q0, $q1, $q2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(<4 x s32>) = COPY $q0
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; CHECK-NEXT: %op1:_(<4 x s32>) = COPY $q1
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; CHECK-NEXT: %op2:_(<4 x s32>) = COPY $q2
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<4 x s32>) = G_FMUL %op0, %op1
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; CHECK-NEXT: %fmad:_(<4 x s32>) = G_FADD [[FMUL]], %op2
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; CHECK-NEXT: $q0 = COPY %fmad(<4 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $q0
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%op0:_(<4 x s32>) = COPY $q0
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%op1:_(<4 x s32>) = COPY $q1
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%op2:_(<4 x s32>) = COPY $q2
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%fmad:_(<4 x s32>) = G_FMAD %op0, %op1, %op2
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$q0 = COPY %fmad
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RET_ReallyLR implicit $q0
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...
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---
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name: v2s64
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $q0, $q1, $q2
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; CHECK-LABEL: name: v2s64
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; CHECK: liveins: $q0, $q1, $q2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %op0:_(<2 x s64>) = COPY $q0
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; CHECK-NEXT: %op1:_(<2 x s64>) = COPY $q1
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; CHECK-NEXT: %op2:_(<2 x s64>) = COPY $q2
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:_(<2 x s64>) = G_FMUL %op0, %op1
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; CHECK-NEXT: %fmad:_(<2 x s64>) = G_FADD [[FMUL]], %op2
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; CHECK-NEXT: $q0 = COPY %fmad(<2 x s64>)
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; CHECK-NEXT: RET_ReallyLR implicit $q0
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%op0:_(<2 x s64>) = COPY $q0
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%op1:_(<2 x s64>) = COPY $q1
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%op2:_(<2 x s64>) = COPY $q2
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%fmad:_(<2 x s64>) = G_FMAD %op0, %op1, %op2
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$q0 = COPY %fmad
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RET_ReallyLR implicit $q0
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...
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