forked from OSchip/llvm-project
[4/6] ARM Neon Intrinsic Tablegen Test Generator.
Added code to NeonEmitter::runTests so that GenTest gets all of the needed arguments to invoke the neon test generation methods. Reviewed by Bob Wilson. llvm-svn: 179640
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@ -1700,7 +1700,8 @@ void NeonEmitter::runHeader(raw_ostream &OS) {
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static std::string GenTest(const std::string &name,
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const std::string &proto,
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StringRef outTypeStr, StringRef inTypeStr,
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bool isShift) {
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bool isShift, bool isHiddenLOp,
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ClassKind ck, const std::string &InstName) {
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assert(!proto.empty() && "");
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std::string s;
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@ -1772,10 +1773,13 @@ void NeonEmitter::runTests(raw_ostream &OS) {
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std::string Proto = R->getValueAsString("Prototype");
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std::string Types = R->getValueAsString("Types");
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bool isShift = R->getValueAsBit("isShift");
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std::string InstName = R->getValueAsString("InstName");
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bool isHiddenLOp = R->getValueAsBit("isHiddenLInst");
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SmallVector<StringRef, 16> TypeVec;
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ParseTypes(R, Types, TypeVec);
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ClassKind ck = ClassMap[R->getSuperClasses()[1]];
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OpKind kind = OpMap[R->getValueAsDef("Operand")->getName()];
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if (kind == OpUnavailable)
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continue;
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@ -1790,10 +1794,12 @@ void NeonEmitter::runTests(raw_ostream &OS) {
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(void)ClassifyType(TypeVec[srcti], inQuad, dummy, dummy);
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if (srcti == ti || inQuad != outQuad)
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continue;
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OS << GenTest(name, Proto, TypeVec[ti], TypeVec[srcti], isShift);
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OS << GenTest(name, Proto, TypeVec[ti], TypeVec[srcti],
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isShift, isHiddenLOp, ck, InstName);
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}
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} else {
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OS << GenTest(name, Proto, TypeVec[ti], TypeVec[ti], isShift);
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OS << GenTest(name, Proto, TypeVec[ti], TypeVec[ti],
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isShift, isHiddenLOp, ck, InstName);
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}
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}
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OS << "\n";
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