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AVX-512: Fixed a bug in lowering saturated operations on KNL. 

The generated code is still not optimal.

Differential Revision: https://reviews.llvm.org/D24723

llvm-svn: 281966
This commit is contained in:
Elena Demikhovsky 2016-09-20 11:02:26 +00:00
parent e330cfa294
commit d3ff7c288b
2 changed files with 18 additions and 2 deletions
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10
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -20867,10 +20867,13 @@ static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS);
SDValue SetCC =
DAG.getNode(X86ISD::SETCC, DL, N->getValueType(1),
DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
DAG.getConstant(X86::COND_O, DL, MVT::i32),
SDValue(Sum.getNode(), 2));
if (N->getValueType(1) == MVT::i1)
SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC);
return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
}
}
@ -20880,10 +20883,13 @@ static SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) {
SDValue Sum = DAG.getNode(BaseOp, DL, VTs, LHS, RHS);
SDValue SetCC =
DAG.getNode(X86ISD::SETCC, DL, N->getValueType(1),
DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
DAG.getConstant(Cond, DL, MVT::i32),
SDValue(Sum.getNode(), 1));
if (N->getValueType(1) == MVT::i1)
SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC);
return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
}

10
llvm/test/CodeGen/X86/xaluo.ll
View File

@ -736,6 +736,15 @@ continue:
}
define i1 @bug27873(i64 %c1, i1 %c2) {
; CHECK-LABEL: bug27873:
; CHECK: ## BB#0:
; CHECK-NEXT: movl $160, %ecx
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %rcx
; CHECK-NEXT: seto %al
; CHECK-NEXT: orb %sil, %al
; CHECK-NEXT: retq
;
; KNL-LABEL: bug27873:
; KNL: ## BB#0:
; KNL-NEXT: andl $1, %esi
@ -744,6 +753,7 @@ define i1 @bug27873(i64 %c1, i1 %c2) {
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: mulq %rcx
; KNL-NEXT: seto %al
; KNL-NEXT: andl $1, %eax
; KNL-NEXT: kmovw %eax, %k1
; KNL-NEXT: korw %k1, %k0, %k0
; KNL-NEXT: kmovw %k0, %eax