forked from OSchip/llvm-project
Zap the last reference to allocation_order_begin().
llvm-svn: 133310
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@ -79,9 +79,9 @@ TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const {
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/// registers for the specific register class.
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static void getAllocatableSetForRC(const MachineFunction &MF,
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const TargetRegisterClass *RC, BitVector &R){
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for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
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E = RC->allocation_order_end(MF); I != E; ++I)
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R.set(*I);
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ArrayRef<unsigned> Order = RC->getRawAllocationOrder(MF);
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for (unsigned i = 0; i != Order.size(); ++i)
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R.set(Order[i]);
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}
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BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
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