Thumb assembly parsing and encoding for ASR.

llvm-svn: 137889
This commit is contained in:
Jim Grosbach 2011-08-17 22:49:09 +00:00
parent 9a468153e1
commit d3e8e29124
3 changed files with 32 additions and 1 deletions

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@ -2693,7 +2693,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
// Next, determine if we have a carry setting bit. We explicitly ignore all
// the instructions we know end in 's'.
if (Mnemonic.endswith("s") &&
!(Mnemonic == "asrs" || Mnemonic == "cps" || Mnemonic == "mls" ||
!(Mnemonic == "cps" || Mnemonic == "mls" ||
Mnemonic == "mrs" || Mnemonic == "smmls" || Mnemonic == "vabs" ||
Mnemonic == "vcls" || Mnemonic == "vmls" || Mnemonic == "vmrs" ||
Mnemonic == "vnmls" || Mnemonic == "vqabs" || Mnemonic == "vrecps" ||

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@ -56,3 +56,23 @@ _func:
@ CHECK: adr r2, _baz @ encoding: [A,0xa2]
@ fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
@------------------------------------------------------------------------------
@ ASR (immediate)
@------------------------------------------------------------------------------
asrs r2, r3, #32
asrs r2, r3, #5
asrs r2, r3, #1
@ CHECK: asrs r2, r3, #32 @ encoding: [0x1a,0x10]
@ CHECK: asrs r2, r3, #5 @ encoding: [0x5a,0x11]
@ CHECK: asrs r2, r3, #1 @ encoding: [0x5a,0x10]
@------------------------------------------------------------------------------
@ ASR (register)
@------------------------------------------------------------------------------
asrs r5, r2
@ CHECK: asrs r5, r2 @ encoding: [0x15,0x41]

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@ -18,3 +18,14 @@
@ CHECK-ERRORS: error: instruction variant requires ARMv6 or later
@ CHECK-ERRORS: mov r2, r3
@ CHECK-ERRORS: ^
@ Out of range immediates for ASR instruction.
asrs r2, r3, #33
asrs r2, r3, #0
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: asrs r2, r3, #33
@ CHECK-ERRORS: ^
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: asrs r2, r3, #0
@ CHECK-ERRORS: ^