forked from OSchip/llvm-project
AArch64: Remove implicit ilist iterator conversions, NFC
llvm-svn: 250216
This commit is contained in:
parent
34f2924675
commit
d3b9df02b3
|
@ -122,7 +122,7 @@ AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
|
|||
static MachineBasicBlock *getBBFallenThrough(MachineBasicBlock *MBB,
|
||||
const TargetInstrInfo *TII) {
|
||||
// Get the previous machine basic block in the function.
|
||||
MachineFunction::iterator MBBI = *MBB;
|
||||
MachineFunction::iterator MBBI(MBB);
|
||||
|
||||
// Can't go off top of function.
|
||||
if (MBBI == MBB->getParent()->begin())
|
||||
|
@ -131,7 +131,7 @@ static MachineBasicBlock *getBBFallenThrough(MachineBasicBlock *MBB,
|
|||
MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
|
||||
SmallVector<MachineOperand, 2> Cond;
|
||||
|
||||
MachineBasicBlock *PrevBB = std::prev(MBBI);
|
||||
MachineBasicBlock *PrevBB = &*std::prev(MBBI);
|
||||
for (MachineBasicBlock *S : MBB->predecessors())
|
||||
if (S == PrevBB && !TII->AnalyzeBranch(*PrevBB, TBB, FBB, Cond) &&
|
||||
!TBB && !FBB)
|
||||
|
|
|
@ -392,7 +392,7 @@ bool AArch64AdvSIMDScalar::runOnMachineFunction(MachineFunction &mf) {
|
|||
|
||||
// Just check things on a one-block-at-a-time basis.
|
||||
for (MachineFunction::iterator I = mf.begin(), E = mf.end(); I != E; ++I)
|
||||
if (processMachineBasicBlock(I))
|
||||
if (processMachineBasicBlock(&*I))
|
||||
Changed = true;
|
||||
return Changed;
|
||||
}
|
||||
|
|
|
@ -142,14 +142,14 @@ void AArch64BranchRelaxation::dumpBBs() {
|
|||
/// into the block immediately after it.
|
||||
static bool BBHasFallthrough(MachineBasicBlock *MBB) {
|
||||
// Get the next machine basic block in the function.
|
||||
MachineFunction::iterator MBBI = MBB;
|
||||
MachineFunction::iterator MBBI(MBB);
|
||||
// Can't fall off end of function.
|
||||
MachineBasicBlock *NextBB = std::next(MBBI);
|
||||
auto NextBB = std::next(MBBI);
|
||||
if (NextBB == MBB->getParent()->end())
|
||||
return false;
|
||||
|
||||
for (MachineBasicBlock *S : MBB->successors())
|
||||
if (S == NextBB)
|
||||
if (S == &*NextBB)
|
||||
return true;
|
||||
|
||||
return false;
|
||||
|
@ -227,9 +227,7 @@ AArch64BranchRelaxation::splitBlockBeforeInstr(MachineInstr *MI) {
|
|||
// Create a new MBB for the code after the OrigBB.
|
||||
MachineBasicBlock *NewBB =
|
||||
MF->CreateMachineBasicBlock(OrigBB->getBasicBlock());
|
||||
MachineFunction::iterator MBBI = OrigBB;
|
||||
++MBBI;
|
||||
MF->insert(MBBI, NewBB);
|
||||
MF->insert(++OrigBB->getIterator(), NewBB);
|
||||
|
||||
// Splice the instructions starting with MI over to NewBB.
|
||||
NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
|
||||
|
@ -432,7 +430,7 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr *MI) {
|
|||
MBB->replaceSuccessor(FBB, NewBB);
|
||||
NewBB->addSuccessor(FBB);
|
||||
}
|
||||
MachineBasicBlock *NextBB = std::next(MachineFunction::iterator(MBB));
|
||||
MachineBasicBlock *NextBB = &*std::next(MachineFunction::iterator(MBB));
|
||||
|
||||
DEBUG(dbgs() << " Insert B to BB#" << DestBB->getNumber()
|
||||
<< ", invert condition and change dest. to BB#"
|
||||
|
|
|
@ -3311,8 +3311,8 @@ bool AArch64FastISel::foldXALUIntrinsic(AArch64CC::CondCode &CC,
|
|||
return false;
|
||||
|
||||
// Make sure nothing is in the way
|
||||
BasicBlock::const_iterator Start = I;
|
||||
BasicBlock::const_iterator End = II;
|
||||
BasicBlock::const_iterator Start(I);
|
||||
BasicBlock::const_iterator End(II);
|
||||
for (auto Itr = std::prev(Start); Itr != End; --Itr) {
|
||||
// We only expect extractvalue instructions between the intrinsic and the
|
||||
// instruction to be selected.
|
||||
|
|
|
@ -974,8 +974,7 @@ AArch64TargetLowering::EmitF128CSEL(MachineInstr *MI,
|
|||
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
|
||||
const BasicBlock *LLVM_BB = MBB->getBasicBlock();
|
||||
DebugLoc DL = MI->getDebugLoc();
|
||||
MachineFunction::iterator It = MBB;
|
||||
++It;
|
||||
MachineFunction::iterator It = ++MBB->getIterator();
|
||||
|
||||
unsigned DestReg = MI->getOperand(0).getReg();
|
||||
unsigned IfTrueReg = MI->getOperand(1).getReg();
|
||||
|
|
|
@ -489,7 +489,7 @@ bool AArch64PromoteConstant::insertDefinitions(
|
|||
|
||||
for (const auto &IPI : InsertPts) {
|
||||
// Create the load of the global variable.
|
||||
IRBuilder<> Builder(IPI.first->getParent(), IPI.first);
|
||||
IRBuilder<> Builder(IPI.first);
|
||||
LoadInst *LoadedCst = Builder.CreateLoad(PromotedGV);
|
||||
DEBUG(dbgs() << "**********\n");
|
||||
DEBUG(dbgs() << "New def: ");
|
||||
|
|
Loading…
Reference in New Issue