[llvm] Use range-based for loops (NFC)

This commit is contained in:
Kazu Hirata 2021-12-11 11:29:12 -08:00
parent 1ab3efac41
commit d395befa65
14 changed files with 43 additions and 56 deletions

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@ -989,10 +989,9 @@ std::string Triple::normalize(StringRef Str) {
}
// Replace empty components with "unknown" value.
for (unsigned i = 0, e = Components.size(); i < e; ++i) {
if (Components[i].empty())
Components[i] = "unknown";
}
for (StringRef &C : Components)
if (C.empty())
C = "unknown";
// Special case logic goes here. At this point Arch, Vendor and OS have the
// correct values for the computed components.

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@ -1876,8 +1876,8 @@ document_iterator Stream::end() {
}
void Stream::skip() {
for (document_iterator i = begin(), e = end(); i != e; ++i)
i->skip();
for (Document &Doc : *this)
Doc.skip();
}
Node::Node(unsigned int Type, std::unique_ptr<Document> &D, StringRef A,

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@ -32,8 +32,8 @@ FindFirstNonCommonLetter(const std::vector<const
// Check to see if letter i is the same across the set.
char Letter = Matches[0]->first[i];
for (unsigned str = 0, e = Matches.size(); str != e; ++str)
if (Matches[str]->first[i] != Letter)
for (const StringMatcher::StringPair *Match : Matches)
if (Match->first[i] != Letter)
return i;
}
@ -75,9 +75,8 @@ bool StringMatcher::EmitStringMatcherForChar(
// Bucket the matches by the character we are comparing.
std::map<char, std::vector<const StringPair*>> MatchesByLetter;
for (unsigned i = 0, e = Matches.size(); i != e; ++i)
MatchesByLetter[Matches[i]->first[CharNo]].push_back(Matches[i]);
for (const StringPair *Match : Matches)
MatchesByLetter[Match->first[CharNo]].push_back(Match);
// If we have exactly one bucket to match, see how many characters are common
// across the whole set and match all of them at once.
@ -135,8 +134,8 @@ void StringMatcher::Emit(unsigned Indent, bool IgnoreDuplicates) const {
// First level categorization: group strings by length.
std::map<unsigned, std::vector<const StringPair*>> MatchesByLength;
for (unsigned i = 0, e = Matches.size(); i != e; ++i)
MatchesByLength[Matches[i].first.size()].push_back(&Matches[i]);
for (const StringPair &Match : Matches)
MatchesByLength[Match.first.size()].push_back(&Match);
// Output a switch statement on length and categorize the elements within each
// bin.

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@ -398,8 +398,8 @@ bool AArch64AdvSIMDScalar::runOnMachineFunction(MachineFunction &mf) {
TII = mf.getSubtarget().getInstrInfo();
// Just check things on a one-block-at-a-time basis.
for (MachineFunction::iterator I = mf.begin(), E = mf.end(); I != E; ++I)
if (processMachineBasicBlock(&*I))
for (MachineBasicBlock &MBB : mf)
if (processMachineBasicBlock(&MBB))
Changed = true;
return Changed;
}

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@ -51,10 +51,9 @@ static bool tryToreplicateChunks(uint64_t UImm,
++Counts[getChunk(UImm, Idx)];
// Traverse the chunks to find one which occurs more than once.
for (CountMap::const_iterator Chunk = Counts.begin(), End = Counts.end();
Chunk != End; ++Chunk) {
const uint64_t ChunkVal = Chunk->first;
const unsigned Count = Chunk->second;
for (const auto &Chunk : Counts) {
const uint64_t ChunkVal = Chunk.first;
const unsigned Count = Chunk.second;
uint64_t Encoding = 0;

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@ -537,15 +537,14 @@ bool AArch64StackTagging::runOnFunction(Function &Fn) {
SmallVector<Instruction *, 4> UnrecognizedLifetimes;
for (auto &BB : *F) {
for (BasicBlock::iterator IT = BB.begin(); IT != BB.end(); ++IT) {
Instruction *I = &*IT;
if (auto *AI = dyn_cast<AllocaInst>(I)) {
for (Instruction &I : BB) {
if (auto *AI = dyn_cast<AllocaInst>(&I)) {
Allocas[AI].AI = AI;
Allocas[AI].OldAI = AI;
continue;
}
if (auto *DVI = dyn_cast<DbgVariableIntrinsic>(I)) {
if (auto *DVI = dyn_cast<DbgVariableIntrinsic>(&I)) {
for (Value *V : DVI->location_ops())
if (auto *AI = dyn_cast_or_null<AllocaInst>(V))
if (Allocas[AI].DbgVariableIntrinsics.empty() ||
@ -554,12 +553,12 @@ bool AArch64StackTagging::runOnFunction(Function &Fn) {
continue;
}
auto *II = dyn_cast<IntrinsicInst>(I);
auto *II = dyn_cast<IntrinsicInst>(&I);
if (II && (II->getIntrinsicID() == Intrinsic::lifetime_start ||
II->getIntrinsicID() == Intrinsic::lifetime_end)) {
AllocaInst *AI = findAllocaForValue(II->getArgOperand(1));
if (!AI) {
UnrecognizedLifetimes.push_back(I);
UnrecognizedLifetimes.push_back(&I);
continue;
}
if (II->getIntrinsicID() == Intrinsic::lifetime_start)
@ -568,8 +567,8 @@ bool AArch64StackTagging::runOnFunction(Function &Fn) {
Allocas[AI].LifetimeEnd.push_back(II);
}
if (isa<ReturnInst>(I) || isa<ResumeInst>(I) || isa<CleanupReturnInst>(I))
RetVec.push_back(I);
if (isa<ReturnInst, ResumeInst, CleanupReturnInst>(&I))
RetVec.push_back(&I);
}
}

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@ -239,8 +239,8 @@ void AArch64_MC::initLLVMToCVRegMapping(MCRegisterInfo *MRI) {
{codeview::RegisterId::ARM64_Q31, AArch64::Q31},
};
for (unsigned I = 0; I < array_lengthof(RegMap); ++I)
MRI->mapLLVMRegToCVReg(RegMap[I].Reg, static_cast<int>(RegMap[I].CVReg));
for (const auto &I : RegMap)
MRI->mapLLVMRegToCVReg(I.Reg, static_cast<int>(I.CVReg));
}
static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {

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@ -652,8 +652,8 @@ bool AMDGPUCallLowering::lowerFormalArguments(
++PSInputNum;
if (SkipArg) {
for (int I = 0, E = VRegs[Idx].size(); I != E; ++I)
B.buildUndef(VRegs[Idx][I]);
for (Register R : VRegs[Idx])
B.buildUndef(R);
++Idx;
continue;

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@ -112,11 +112,9 @@ class AMDGPULowerModuleLDS : public ModulePass {
removeFromUsedLists(Module &M,
const std::vector<GlobalVariable *> &LocalVars) {
SmallPtrSet<Constant *, 32> LocalVarsSet;
for (size_t I = 0; I < LocalVars.size(); I++) {
if (Constant *C = dyn_cast<Constant>(LocalVars[I]->stripPointerCasts())) {
for (GlobalVariable *LocalVar : LocalVars)
if (Constant *C = dyn_cast<Constant>(LocalVar->stripPointerCasts()))
LocalVarsSet.insert(C);
}
}
removeFromUsedList(M, "llvm.used", LocalVarsSet);
removeFromUsedList(M, "llvm.compiler.used", LocalVarsSet);
}

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@ -2786,12 +2786,8 @@ AMDGPUMachineCFGStructurizer::initializeSelectRegisters(MRT *MRT, unsigned Selec
// Fixme: Move linearization creation to the original spot
createLinearizedRegion(Region, SelectOut);
for (auto CI = Region->getChildren()->begin(),
CE = Region->getChildren()->end();
CI != CE; ++CI) {
InnerSelectOut =
initializeSelectRegisters((*CI), InnerSelectOut, MRI, TII);
}
for (auto *CI : *Region->getChildren())
InnerSelectOut = initializeSelectRegisters(CI, InnerSelectOut, MRI, TII);
MRT->setBBSelectRegIn(InnerSelectOut);
return InnerSelectOut;
} else {

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@ -259,10 +259,9 @@ class ReplaceLDSUseImpl {
auto FunctionToInsts =
AMDGPU::getFunctionToInstsMap(U, false /*=CollectKernelInsts*/);
for (auto FI = FunctionToInsts.begin(), FE = FunctionToInsts.end();
FI != FE; ++FI) {
Function *F = FI->first;
auto &Insts = FI->second;
for (const auto &FunctionToInst : FunctionToInsts) {
Function *F = FunctionToInst.first;
auto &Insts = FunctionToInst.second;
for (auto *I : Insts) {
// If `U` is a constant expression, then we need to break the
// associated instruction into a set of separate instructions by
@ -355,10 +354,9 @@ bool ReplaceLDSUseImpl::replaceLDSUse(GlobalVariable *GV) {
// Traverse through each kernel K, check and if required, initialize the
// LDS pointer to point to LDS within K.
for (auto KI = KernelToCallees.begin(), KE = KernelToCallees.end(); KI != KE;
++KI) {
Function *K = KI->first;
SmallPtrSet<Function *, 8> Callees = KI->second;
for (const auto &KernelToCallee : KernelToCallees) {
Function *K = KernelToCallee.first;
SmallPtrSet<Function *, 8> Callees = KernelToCallee.second;
// Compute reachable and LDS used callees for kernel K.
set_intersect(Callees, LDSAccessors);

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@ -120,8 +120,7 @@ unsigned AMDGPUCustomBehaviour::handleWaitCnt(ArrayRef<InstRef> IssuedInst,
// We will now look at each of the currently executing instructions
// to find out if this wait instruction still needs to wait.
for (auto I = IssuedInst.begin(), E = IssuedInst.end(); I != E; I++) {
const InstRef &PrevIR = *I;
for (const InstRef &PrevIR : IssuedInst) {
const Instruction &PrevInst = *PrevIR.getInstruction();
const unsigned PrevInstIndex = PrevIR.getSourceIndex() % SrcMgr.size();
const WaitCntInfo &PrevInstWaitInfo = InstrWaitCntInfo[PrevInstIndex];

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@ -328,9 +328,9 @@ SUnit *R600SchedStrategy::PopInst(std::vector<SUnit *> &Q, bool AnyALU) {
void R600SchedStrategy::LoadAlu() {
std::vector<SUnit *> &QSrc = Pending[IDAlu];
for (unsigned i = 0, e = QSrc.size(); i < e; ++i) {
AluKind AK = getAluKind(QSrc[i]);
AvailableAlus[AK].push_back(QSrc[i]);
for (SUnit *SU : QSrc) {
AluKind AK = getAluKind(SU);
AvailableAlus[AK].push_back(SU);
}
QSrc.clear();
}

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@ -307,8 +307,8 @@ class R600OpenCLImageTypeLoweringPass : public ModulePass {
// Build new MDNode.
SmallVector<Metadata *, 6> KernelMDArgs;
KernelMDArgs.push_back(ConstantAsMetadata::get(NewF));
for (unsigned i = 0; i < NumKernelArgMDNodes; ++i)
KernelMDArgs.push_back(MDNode::get(*Context, NewArgMDs.ArgVector[i]));
for (const MDVector &MDV : NewArgMDs.ArgVector)
KernelMDArgs.push_back(MDNode::get(*Context, MDV));
MDNode *NewMDNode = MDNode::get(*Context, KernelMDArgs);
return std::make_tuple(NewF, NewMDNode);