forked from OSchip/llvm-project
[mlir][linalg] Memoize indexing map generation.
Differential Revision: https://reviews.llvm.org/D97602
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@ -2333,8 +2333,11 @@ static void printNamedStructuredOpResults(OpAsmPrinter &p,
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template <typename NamedStructuredOpType>
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static void printNamedStructuredOp(OpAsmPrinter &p, NamedStructuredOpType op) {
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p << op.getOperationName();
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p.printOptionalAttrDict(op->getAttrs(),
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/*elidedAttrs=*/{"operand_segment_sizes"});
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p.printOptionalAttrDict(
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op->getAttrs(),
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/*elidedAttrs=*/{"operand_segment_sizes",
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// See generated code in mlir-linalg-yaml-gen.cpp
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"linalg.memoized_indexing_maps"});
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// Printing is shared with generic ops, except for the region and
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// attributes.
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@ -651,11 +651,18 @@ static SmallVector<AffineExpr> getSymbolBindings({0} self) {
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// {2}: Statements
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static const char structuredOpIndexingMapsFormat[] = R"FMT(
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ArrayAttr {0}::indexing_maps() {
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static const char memoizeAttr[] = "linalg.memoized_indexing_maps";
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ArrayAttr cached = getOperation()->getAttrOfType<ArrayAttr>(memoizeAttr);
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if (cached)
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return cached;
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MLIRContext *context = getContext();
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auto symbolBindings = getSymbolBindings(*this);
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SmallVector<AffineMap> maps;
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{2}
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return Builder(context).getAffineMapArrayAttr(maps);
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cached = Builder(context).getAffineMapArrayAttr(maps);
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getOperation()->setAttr(memoizeAttr, cached);
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return cached;
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}
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)FMT";
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