forked from OSchip/llvm-project
Simplify the type adjustment in the IslExprBuilder
We now have a simple function to adjust/unify the types of two (or three) operands before an operation that requieres the same type for all operands. Due to this change we will not promote parameters that are added to i64 anymore if that is not needed. llvm-svn: 271513
This commit is contained in:
Johannes Doerfert
parent
a91c85a5b9
commit
d36553753e
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@ -114,13 +114,19 @@ public:
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/// @return The llvm::Value* containing the result of the computation.
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llvm::Value *create(__isl_take isl_ast_expr *Expr);
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/// @brief Return the largest of two types.
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/// @brief Unify the types of @p V0 and @p V1 in-place.
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///
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/// @param T1 The first type.
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/// @param T2 The second type.
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/// The values @p V0 and @p V1 will be updated in place such that
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/// type(V0) == type(V1) == MaxType
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/// where MaxType is the larger type of the initial @p V0 and @p V1.
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void unifyTypes(llvm::Value *&V0, llvm::Value *&V1) {
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unifyTypes(V0, V1, V1);
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}
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/// @brief Unify the types of @p V0, @p V1 and @p V2 in-place.
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///
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/// @return The largest of the two types.
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llvm::Type *getWidestType(llvm::Type *T1, llvm::Type *T2);
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/// The same as unifyTypes above but for three values instead of two.
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void unifyTypes(llvm::Value *&V0, llvm::Value *&V1, llvm::Value *&V2);
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/// @brief Return the type with which this expression should be computed.
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///
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@ -74,6 +74,8 @@ Value *IslExprBuilder::getOverflowState() const {
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Value *IslExprBuilder::createBinOp(BinaryOperator::BinaryOps Opc, Value *LHS,
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Value *RHS, const Twine &Name) {
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unifyTypes(LHS, RHS);
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// Handle the plain operation (without overflow tracking) first.
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if (!OverflowState) {
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switch (Opc) {
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@ -137,7 +139,7 @@ Value *IslExprBuilder::createMul(Value *LHS, Value *RHS, const Twine &Name) {
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return createBinOp(Instruction::Mul, LHS, RHS, Name);
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}
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Type *IslExprBuilder::getWidestType(Type *T1, Type *T2) {
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static Type *getWidestType(Type *T1, Type *T2) {
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assert(isa<IntegerType>(T1) && isa<IntegerType>(T2));
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if (T1->getPrimitiveSizeInBits() < T2->getPrimitiveSizeInBits())
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@ -146,23 +148,29 @@ Type *IslExprBuilder::getWidestType(Type *T1, Type *T2) {
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return T1;
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}
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void IslExprBuilder::unifyTypes(Value *&V0, Value *&V1, Value *&V2) {
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auto *T0 = V0->getType();
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auto *T1 = V1->getType();
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auto *T2 = V2->getType();
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if (T0 == T1 && T1 == T2)
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return;
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auto *MaxT = getWidestType(T0, T1);
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MaxT = getWidestType(MaxT, T2);
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V0 = Builder.CreateSExt(V0, MaxT);
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V1 = Builder.CreateSExt(V1, MaxT);
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V2 = Builder.CreateSExt(V2, MaxT);
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}
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Value *IslExprBuilder::createOpUnary(__isl_take isl_ast_expr *Expr) {
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assert(isl_ast_expr_get_op_type(Expr) == isl_ast_op_minus &&
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"Unsupported unary operation");
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Value *V;
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Type *MaxType = getType(Expr);
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assert(MaxType->isIntegerTy() &&
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auto *V = create(isl_ast_expr_get_op_arg(Expr, 0));
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assert(V->getType()->isIntegerTy() &&
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"Unary expressions can only be created for integer types");
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V = create(isl_ast_expr_get_op_arg(Expr, 0));
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MaxType = getWidestType(MaxType, V->getType());
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if (MaxType != V->getType())
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V = Builder.CreateSExt(V, MaxType);
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isl_ast_expr_free(Expr);
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return createSub(ConstantInt::getNullValue(MaxType), V);
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return createSub(ConstantInt::getNullValue(V->getType()), V);
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}
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Value *IslExprBuilder::createOpNAry(__isl_take isl_ast_expr *Expr) {
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@ -179,13 +187,7 @@ Value *IslExprBuilder::createOpNAry(__isl_take isl_ast_expr *Expr) {
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Value *OpV;
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OpV = create(isl_ast_expr_get_op_arg(Expr, i));
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Type *Ty = getWidestType(V->getType(), OpV->getType());
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if (Ty != OpV->getType())
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OpV = Builder.CreateSExt(OpV, Ty);
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if (Ty != V->getType())
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V = Builder.CreateSExt(V, Ty);
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unifyTypes(V, OpV);
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switch (isl_ast_expr_get_op_type(Expr)) {
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default:
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@ -250,18 +252,8 @@ Value *IslExprBuilder::createAccessAddress(isl_ast_expr *Expr) {
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assert(NextIndex->getType()->isIntegerTy() &&
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"Access index should be an integer");
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if (!IndexOp) {
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IndexOp = NextIndex;
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} else {
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Type *Ty = getWidestType(NextIndex->getType(), IndexOp->getType());
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if (Ty != NextIndex->getType())
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NextIndex = Builder.CreateIntCast(NextIndex, Ty, true);
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if (Ty != IndexOp->getType())
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IndexOp = Builder.CreateIntCast(IndexOp, Ty, true);
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IndexOp = createAdd(IndexOp, NextIndex, "polly.access.add." + BaseName);
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}
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IndexOp = !IndexOp ? NextIndex : createAdd(IndexOp, NextIndex,
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"polly.access.add." + BaseName);
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// For every but the last dimension multiply the size, for the last
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// dimension we can exit the loop.
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@ -276,14 +268,6 @@ Value *IslExprBuilder::createAccessAddress(isl_ast_expr *Expr) {
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expandCodeFor(S, SE, DL, "polly", DimSCEV, DimSCEV->getType(),
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&*Builder.GetInsertPoint());
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Type *Ty = getWidestType(DimSize->getType(), IndexOp->getType());
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if (Ty != IndexOp->getType())
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IndexOp = Builder.CreateSExtOrTrunc(IndexOp, Ty,
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"polly.access.sext." + BaseName);
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if (Ty != DimSize->getType())
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DimSize = Builder.CreateSExtOrTrunc(DimSize, Ty,
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"polly.access.sext." + BaseName);
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IndexOp = createMul(IndexOp, DimSize, "polly.access.mul." + BaseName);
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}
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@ -301,7 +285,6 @@ Value *IslExprBuilder::createOpAccess(isl_ast_expr *Expr) {
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Value *IslExprBuilder::createOpBin(__isl_take isl_ast_expr *Expr) {
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Value *LHS, *RHS, *Res;
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Type *MaxType;
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isl_ast_op_type OpType;
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assert(isl_ast_expr_get_type(Expr) == isl_ast_expr_op &&
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@ -314,41 +297,25 @@ Value *IslExprBuilder::createOpBin(__isl_take isl_ast_expr *Expr) {
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LHS = create(isl_ast_expr_get_op_arg(Expr, 0));
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RHS = create(isl_ast_expr_get_op_arg(Expr, 1));
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Type *LHSType = LHS->getType();
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Type *RHSType = RHS->getType();
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MaxType = getWidestType(LHSType, RHSType);
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// Take the result into account when calculating the widest type.
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//
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// For operations such as '+' the result may require a type larger than
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// the type of the individual operands. For other operations such as '/', the
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// result type cannot be larger than the type of the individual operand. isl
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// does not calculate correct types for these operations and we consequently
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// exclude those operations here.
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// For possibly overflowing operations we will later adjust types but
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// for others we do it now as we will directly create the operations.
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switch (OpType) {
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case isl_ast_op_pdiv_q:
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case isl_ast_op_pdiv_r:
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case isl_ast_op_div:
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case isl_ast_op_fdiv_q:
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case isl_ast_op_zdiv_r:
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// Do nothing
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unifyTypes(LHS, RHS);
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break;
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case isl_ast_op_add:
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case isl_ast_op_sub:
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case isl_ast_op_mul:
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MaxType = getWidestType(MaxType, getType(Expr));
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// Do nothing
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break;
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default:
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llvm_unreachable("This is no binary isl ast expression");
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}
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if (MaxType != RHS->getType())
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RHS = Builder.CreateSExt(RHS, MaxType);
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if (MaxType != LHS->getType())
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LHS = Builder.CreateSExt(LHS, MaxType);
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switch (OpType) {
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default:
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llvm_unreachable("This is no binary isl ast expression");
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@ -379,13 +346,15 @@ Value *IslExprBuilder::createOpBin(__isl_take isl_ast_expr *Expr) {
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// incorrect overflow in some bordercases.
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//
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// floord(n,d) ((n < 0) ? (n - d + 1) : n) / d
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Value *One = ConstantInt::get(MaxType, 1);
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Value *Zero = ConstantInt::get(MaxType, 0);
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Value *Sum1 = createSub(LHS, RHS, "pexp.fdiv_q.0");
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Value *One = ConstantInt::get(Sum1->getType(), 1);
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Value *Sum2 = createAdd(Sum1, One, "pexp.fdiv_q.1");
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Value *Zero = ConstantInt::get(LHS->getType(), 0);
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Value *isNegative = Builder.CreateICmpSLT(LHS, Zero, "pexp.fdiv_q.2");
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unifyTypes(LHS, Sum2);
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Value *Dividend =
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Builder.CreateSelect(isNegative, Sum2, LHS, "pexp.fdiv_q.3");
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unifyTypes(Dividend, RHS);
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Res = Builder.CreateSDiv(Dividend, RHS, "pexp.fdiv_q.4");
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break;
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}
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@ -410,7 +379,6 @@ Value *IslExprBuilder::createOpSelect(__isl_take isl_ast_expr *Expr) {
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assert(isl_ast_expr_get_op_type(Expr) == isl_ast_op_select &&
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"Unsupported unary isl ast expression");
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Value *LHS, *RHS, *Cond;
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Type *MaxType = getType(Expr);
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Cond = create(isl_ast_expr_get_op_arg(Expr, 0));
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if (!Cond->getType()->isIntegerTy(1))
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@ -418,17 +386,8 @@ Value *IslExprBuilder::createOpSelect(__isl_take isl_ast_expr *Expr) {
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LHS = create(isl_ast_expr_get_op_arg(Expr, 1));
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RHS = create(isl_ast_expr_get_op_arg(Expr, 2));
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unifyTypes(LHS, RHS);
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MaxType = getWidestType(MaxType, LHS->getType());
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MaxType = getWidestType(MaxType, RHS->getType());
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if (MaxType != RHS->getType())
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RHS = Builder.CreateSExt(RHS, MaxType);
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if (MaxType != LHS->getType())
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LHS = Builder.CreateSExt(LHS, MaxType);
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// TODO: Do we want to truncate the result?
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isl_ast_expr_free(Expr);
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return Builder.CreateSelect(Cond, LHS, RHS);
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}
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@ -461,16 +420,7 @@ Value *IslExprBuilder::createOpICmp(__isl_take isl_ast_expr *Expr) {
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if (RHSTy->isPointerTy())
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RHS = Builder.CreatePtrToInt(RHS, PtrAsIntTy);
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if (LHS->getType() != RHS->getType()) {
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Type *MaxType = LHS->getType();
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MaxType = getWidestType(MaxType, RHS->getType());
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if (MaxType != RHS->getType())
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RHS = Builder.CreateSExt(RHS, MaxType);
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if (MaxType != LHS->getType())
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LHS = Builder.CreateSExt(LHS, MaxType);
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}
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unifyTypes(LHS, RHS);
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isl_ast_op_type OpType = isl_ast_expr_get_op_type(Expr);
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assert(OpType >= isl_ast_op_eq && OpType <= isl_ast_op_gt &&
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@ -390,14 +390,7 @@ void IslNodeBuilder::createForVector(__isl_take isl_ast_node *For,
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Value *ValueLB = ExprBuilder.create(Init);
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Value *ValueInc = ExprBuilder.create(Inc);
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Type *MaxType = ExprBuilder.getType(Iterator);
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MaxType = ExprBuilder.getWidestType(MaxType, ValueLB->getType());
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MaxType = ExprBuilder.getWidestType(MaxType, ValueInc->getType());
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if (MaxType != ValueLB->getType())
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ValueLB = Builder.CreateSExt(ValueLB, MaxType);
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if (MaxType != ValueInc->getType())
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ValueInc = Builder.CreateSExt(ValueInc, MaxType);
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ExprBuilder.unifyTypes(ValueLB, ValueInc);
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std::vector<Value *> IVS(VectorWidth);
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IVS[0] = ValueLB;
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@ -472,17 +465,7 @@ void IslNodeBuilder::createForSequential(__isl_take isl_ast_node *For,
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ValueUB = ExprBuilder.create(UB);
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ValueInc = ExprBuilder.create(Inc);
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MaxType = ExprBuilder.getType(Iterator);
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MaxType = ExprBuilder.getWidestType(MaxType, ValueLB->getType());
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MaxType = ExprBuilder.getWidestType(MaxType, ValueUB->getType());
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MaxType = ExprBuilder.getWidestType(MaxType, ValueInc->getType());
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if (MaxType != ValueLB->getType())
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ValueLB = Builder.CreateSExt(ValueLB, MaxType);
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if (MaxType != ValueUB->getType())
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ValueUB = Builder.CreateSExt(ValueUB, MaxType);
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if (MaxType != ValueInc->getType())
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ValueInc = Builder.CreateSExt(ValueInc, MaxType);
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ExprBuilder.unifyTypes(ValueLB, ValueUB, ValueInc);
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// If we can show that LB <Predicate> UB holds at least once, we can
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// omit the GuardBB in front of the loop.
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@ -583,17 +566,7 @@ void IslNodeBuilder::createForParallel(__isl_take isl_ast_node *For) {
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ValueUB = Builder.CreateAdd(
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ValueUB, Builder.CreateSExt(Builder.getTrue(), ValueUB->getType()));
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MaxType = ExprBuilder.getType(Iterator);
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MaxType = ExprBuilder.getWidestType(MaxType, ValueLB->getType());
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MaxType = ExprBuilder.getWidestType(MaxType, ValueUB->getType());
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MaxType = ExprBuilder.getWidestType(MaxType, ValueInc->getType());
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if (MaxType != ValueLB->getType())
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ValueLB = Builder.CreateSExt(ValueLB, MaxType);
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if (MaxType != ValueUB->getType())
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ValueUB = Builder.CreateSExt(ValueUB, MaxType);
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if (MaxType != ValueInc->getType())
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ValueInc = Builder.CreateSExt(ValueInc, MaxType);
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ExprBuilder.unifyTypes(ValueLB, ValueUB, ValueInc);
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BasicBlock::iterator LoopBody;
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@ -61,6 +61,8 @@ Value *polly::createLoop(Value *LB, Value *UB, Value *Stride,
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assert(LB->getType() == UB->getType() && "Types of loop bounds do not match");
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IntegerType *LoopIVType = dyn_cast<IntegerType>(UB->getType());
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assert(LoopIVType && "UB is not integer?");
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assert((LoopIVType == LB->getType() && LoopIVType == Stride->getType()) &&
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"LB, UB and Stride should have equal types.");
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BasicBlock *BeforeBB = Builder.GetInsertBlock();
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BasicBlock *GuardBB =
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@ -121,7 +123,6 @@ Value *polly::createLoop(Value *LB, Value *UB, Value *Stride,
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Builder.SetInsertPoint(HeaderBB);
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PHINode *IV = Builder.CreatePHI(LoopIVType, 2, "polly.indvar");
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IV->addIncoming(LB, PreHeaderBB);
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Stride = Builder.CreateZExtOrBitCast(Stride, LoopIVType);
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Value *IncrementedIV = Builder.CreateNSWAdd(IV, Stride, "polly.indvar_next");
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Value *LoopCondition;
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UB = Builder.CreateSub(UB, Stride, "polly.adjust_ub");
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@ -147,6 +148,12 @@ Value *polly::createLoop(Value *LB, Value *UB, Value *Stride,
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Value *ParallelLoopGenerator::createParallelLoop(
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Value *LB, Value *UB, Value *Stride, SetVector<Value *> &UsedValues,
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ValueMapT &Map, BasicBlock::iterator *LoopBody) {
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// Adjust the types to match the GOMP API.
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LB = Builder.CreateSExt(LB, LongType);
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UB = Builder.CreateSExt(UB, LongType);
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Stride = Builder.CreateSExt(Stride, LongType);
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Function *SubFn;
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AllocaInst *Struct = storeValuesIntoStruct(UsedValues);
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@ -14,34 +14,32 @@
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; CHECK-NEXT: Execution Context: [N, p, q] -> { : N > 0 }
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; CHECK-NEXT: }
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;
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; IR: polly.preload.merge:
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; IR: polly.preload.merge:
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; IR-NEXT: %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
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; IR-NEXT: store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
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; IR-NEXT: %12 = sext i32 %N to i64
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; IR-NEXT: %13 = icmp sge i64 %12, 1
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; IR-NEXT: %14 = sext i32 %q to i64
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; IR-NEXT: %15 = sext i32 %p to i64
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; IR-NEXT: %16 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %15, i64 %14)
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; IR-NEXT: %.obit4 = extractvalue { i64, i1 } %16, 1
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; IR-NEXT: %10 = sext i32 %N to i64
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; IR-NEXT: %11 = icmp sge i64 %10, 1
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; IR-NEXT: %12 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %p, i32 %q)
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; IR-NEXT: %.obit4 = extractvalue { i32, i1 } %12, 1
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; IR-NEXT: %polly.overflow.state5 = or i1 false, %.obit4
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; IR-NEXT: %.res6 = extractvalue { i64, i1 } %16, 0
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; IR-NEXT: %17 = icmp sle i64 %.res6, 2147483647
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; IR-NEXT: %18 = and i1 %13, %17
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; IR-NEXT: %19 = sext i32 %q to i64
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; IR-NEXT: %20 = sext i32 %p to i64
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; IR-NEXT: %21 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %20, i64 %19)
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; IR-NEXT: %.obit7 = extractvalue { i64, i1 } %21, 1
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; IR-NEXT: %.res6 = extractvalue { i32, i1 } %12, 0
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; IR-NEXT: %13 = sext i32 %.res6 to i64
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; IR-NEXT: %14 = icmp sle i64 %13, 2147483647
|
||||
; IR-NEXT: %15 = and i1 %11, %14
|
||||
; IR-NEXT: %16 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %p, i32 %q)
|
||||
; IR-NEXT: %.obit7 = extractvalue { i32, i1 } %16, 1
|
||||
; IR-NEXT: %polly.overflow.state8 = or i1 %polly.overflow.state5, %.obit7
|
||||
; IR-NEXT: %.res9 = extractvalue { i64, i1 } %21, 0
|
||||
; IR-NEXT: %22 = icmp sge i64 %.res9, -2147483648
|
||||
; IR-NEXT: %23 = and i1 %18, %22
|
||||
; IR-NEXT: %.res9 = extractvalue { i32, i1 } %16, 0
|
||||
; IR-NEXT: %17 = sext i32 %.res9 to i64
|
||||
; IR-NEXT: %18 = icmp sge i64 %17, -2147483648
|
||||
; IR-NEXT: %19 = and i1 %15, %18
|
||||
; IR-NEXT: %polly.preload.cond.overflown10 = xor i1 %polly.overflow.state8, true
|
||||
; IR-NEXT: %polly.preload.cond.result11 = and i1 %23, %polly.preload.cond.overflown10
|
||||
; IR-NEXT: %polly.preload.cond.result11 = and i1 %19, %polly.preload.cond.overflown10
|
||||
; IR-NEXT: br label %polly.preload.cond12
|
||||
;
|
||||
; IR: polly.preload.cond12:
|
||||
; IR-NEXT: br i1 %polly.preload.cond.result11
|
||||
;
|
||||
; IR: polly.preload.cond12:
|
||||
; IR-NEXT: br i1 %polly.preload.cond.result11, label %polly.preload.exec14, label %polly.preload.merge13
|
||||
|
||||
; IR: polly.preload.exec14:
|
||||
; IR-NEXT: %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i64 0
|
||||
; IR-NEXT: %polly.access.polly.preload.tmp1.merge.load = load i32, i32* %polly.access.polly.preload.tmp1.merge, align 4
|
||||
|
|
@ -49,24 +47,22 @@
|
|||
; IRA: polly.preload.merge:
|
||||
; IRA-NEXT: %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
|
||||
; IRA-NEXT: store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
|
||||
; IRA-NEXT: %12 = sext i32 %N to i64
|
||||
; IRA-NEXT: %13 = icmp sge i64 %12, 1
|
||||
; IRA-NEXT: %14 = sext i32 %q to i64
|
||||
; IRA-NEXT: %15 = sext i32 %p to i64
|
||||
; IRA-NEXT: %16 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %15, i64 %14)
|
||||
; IRA-NEXT: %.obit5 = extractvalue { i64, i1 } %16, 1
|
||||
; IRA-NEXT: %.res6 = extractvalue { i64, i1 } %16, 0
|
||||
; IRA-NEXT: %17 = icmp sle i64 %.res6, 2147483647
|
||||
; IRA-NEXT: %18 = and i1 %13, %17
|
||||
; IRA-NEXT: %19 = sext i32 %q to i64
|
||||
; IRA-NEXT: %20 = sext i32 %p to i64
|
||||
; IRA-NEXT: %21 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %20, i64 %19)
|
||||
; IRA-NEXT: %.obit7 = extractvalue { i64, i1 } %21, 1
|
||||
; IRA-NEXT: %.res8 = extractvalue { i64, i1 } %21, 0
|
||||
; IRA-NEXT: %22 = icmp sge i64 %.res8, -2147483648
|
||||
; IRA-NEXT: %23 = and i1 %18, %22
|
||||
; IRA-NEXT: %10 = sext i32 %N to i64
|
||||
; IRA-NEXT: %11 = icmp sge i64 %10, 1
|
||||
; IRA-NEXT: %12 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %p, i32 %q)
|
||||
; IRA-NEXT: %.obit5 = extractvalue { i32, i1 } %12, 1
|
||||
; IRA-NEXT: %.res6 = extractvalue { i32, i1 } %12, 0
|
||||
; IRA-NEXT: %13 = sext i32 %.res6 to i64
|
||||
; IRA-NEXT: %14 = icmp sle i64 %13, 2147483647
|
||||
; IRA-NEXT: %15 = and i1 %11, %14
|
||||
; IRA-NEXT: %16 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %p, i32 %q)
|
||||
; IRA-NEXT: %.obit7 = extractvalue { i32, i1 } %16, 1
|
||||
; IRA-NEXT: %.res8 = extractvalue { i32, i1 } %16, 0
|
||||
; IRA-NEXT: %17 = sext i32 %.res8 to i64
|
||||
; IRA-NEXT: %18 = icmp sge i64 %17, -2147483648
|
||||
; IRA-NEXT: %19 = and i1 %15, %18
|
||||
; IRA-NEXT: %polly.preload.cond.overflown9 = xor i1 %.obit7, true
|
||||
; IRA-NEXT: %polly.preload.cond.result10 = and i1 %23, %polly.preload.cond.overflown9
|
||||
; IRA-NEXT: %polly.preload.cond.result10 = and i1 %19, %polly.preload.cond.overflown9
|
||||
; IRA-NEXT: br label %polly.preload.cond11
|
||||
;
|
||||
; IRA: polly.preload.cond11:
|
||||
|
|
|
|||
|
|
@ -16,22 +16,20 @@
|
|||
; IR: polly.preload.merge:
|
||||
; IR-NEXT: %polly.preload.tmp1.merge = phi i32* [ %polly.access.I.load, %polly.preload.exec ], [ null, %polly.preload.cond ]
|
||||
; IR-NEXT: store i32* %polly.preload.tmp1.merge, i32** %tmp1.preload.s2a
|
||||
; IR-NEXT: %12 = sext i32 %N to i64
|
||||
; IR-NEXT: %13 = icmp sge i64 %12, 1
|
||||
; IR-NEXT: %14 = sext i32 %q to i64
|
||||
; IR-NEXT: %15 = sext i32 %p to i64
|
||||
; IR-NEXT: %16 = add nsw i64 %15, %14
|
||||
; IR-NEXT: %17 = icmp sle i64 %16, 2147483647
|
||||
; IR-NEXT: %18 = and i1 %13, %17
|
||||
; IR-NEXT: %19 = sext i32 %q to i64
|
||||
; IR-NEXT: %20 = sext i32 %p to i64
|
||||
; IR-NEXT: %21 = add nsw i64 %20, %19
|
||||
; IR-NEXT: %22 = icmp sge i64 %21, -2147483648
|
||||
; IR-NEXT: %23 = and i1 %18, %22
|
||||
; IR-NEXT: %10 = sext i32 %N to i64
|
||||
; IR-NEXT: %11 = icmp sge i64 %10, 1
|
||||
; IR-NEXT: %12 = add nsw i32 %p, %q
|
||||
; IR-NEXT: %13 = sext i32 %12 to i64
|
||||
; IR-NEXT: %14 = icmp sle i64 %13, 2147483647
|
||||
; IR-NEXT: %15 = and i1 %11, %14
|
||||
; IR-NEXT: %16 = add nsw i32 %p, %q
|
||||
; IR-NEXT: %17 = sext i32 %16 to i64
|
||||
; IR-NEXT: %18 = icmp sge i64 %17, -2147483648
|
||||
; IR-NEXT: %19 = and i1 %15, %18
|
||||
; IR-NEXT: br label %polly.preload.cond1
|
||||
;
|
||||
; IR: polly.preload.cond1:
|
||||
; IR-NEXT: br i1 %23
|
||||
; IR-NEXT: br i1 %19
|
||||
;
|
||||
; IR: polly.preload.exec3:
|
||||
; IR-NEXT: %polly.access.polly.preload.tmp1.merge = getelementptr i32, i32* %polly.preload.tmp1.merge, i64 0
|
||||
|
|
|
|||
Loading…
Reference in New Issue