forked from OSchip/llvm-project
[VectorCombine] adjust tests for extract-binop; NFC
We want the extra-use tests to be consistent with the earlier single-use tests and be as cheap as possible in vector form to show cost model edge cases. So use i8 and extract from element 0 since that should be cheap for all x86 targets.
This commit is contained in:
Sanjay Patel
parent
578c13d13c
commit
d3551516ee
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@ -129,79 +129,79 @@ define i32 @ext1_ext1_add_same_vec_cse(<4 x i32> %x) {
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ret i32 %r
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}
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declare void @use_i64(i64)
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declare void @use_i8(i8)
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define i64 @ext1_ext1_add_same_vec_extra_use0(<2 x i64> %x) {
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define i8 @ext1_ext1_add_same_vec_extra_use0(<16 x i8> %x) {
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; CHECK-LABEL: @ext1_ext1_add_same_vec_extra_use0(
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; CHECK-NEXT: [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
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; CHECK-NEXT: call void @use_i64(i64 [[E0]])
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x i64> [[X]], i32 1
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; CHECK-NEXT: [[R:%.*]] = add i64 [[E0]], [[E1]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK-NEXT: [[E0:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0
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; CHECK-NEXT: call void @use_i8(i8 [[E0]])
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; CHECK-NEXT: [[E1:%.*]] = extractelement <16 x i8> [[X]], i32 0
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; CHECK-NEXT: [[R:%.*]] = add i8 [[E0]], [[E1]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%e0 = extractelement <2 x i64> %x, i32 1
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call void @use_i64(i64 %e0)
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%e1 = extractelement <2 x i64> %x, i32 1
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%r = add i64 %e0, %e1
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ret i64 %r
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%e0 = extractelement <16 x i8> %x, i32 0
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call void @use_i8(i8 %e0)
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%e1 = extractelement <16 x i8> %x, i32 0
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%r = add i8 %e0, %e1
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ret i8 %r
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}
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define i64 @ext1_ext1_add_same_vec_extra_use1(<2 x i64> %x) {
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define i8 @ext1_ext1_add_same_vec_extra_use1(<16 x i8> %x) {
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; CHECK-LABEL: @ext1_ext1_add_same_vec_extra_use1(
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; CHECK-NEXT: [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x i64> [[X]], i32 1
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; CHECK-NEXT: call void @use_i64(i64 [[E1]])
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; CHECK-NEXT: [[R:%.*]] = add i64 [[E0]], [[E1]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK-NEXT: [[E0:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0
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; CHECK-NEXT: [[E1:%.*]] = extractelement <16 x i8> [[X]], i32 0
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; CHECK-NEXT: call void @use_i8(i8 [[E1]])
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; CHECK-NEXT: [[R:%.*]] = add i8 [[E0]], [[E1]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%e0 = extractelement <2 x i64> %x, i32 1
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%e1 = extractelement <2 x i64> %x, i32 1
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call void @use_i64(i64 %e1)
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%r = add i64 %e0, %e1
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ret i64 %r
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%e0 = extractelement <16 x i8> %x, i32 0
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%e1 = extractelement <16 x i8> %x, i32 0
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call void @use_i8(i8 %e1)
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%r = add i8 %e0, %e1
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ret i8 %r
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}
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define i64 @ext1_ext1_add_same_vec_cse_extra_use(<2 x i64> %x) {
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define i8 @ext1_ext1_add_same_vec_cse_extra_use(<16 x i8> %x) {
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; CHECK-LABEL: @ext1_ext1_add_same_vec_cse_extra_use(
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; CHECK-NEXT: [[E:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
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; CHECK-NEXT: call void @use_i64(i64 [[E]])
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; CHECK-NEXT: [[R:%.*]] = add i64 [[E]], [[E]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK-NEXT: [[E:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0
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; CHECK-NEXT: call void @use_i8(i8 [[E]])
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; CHECK-NEXT: [[R:%.*]] = add i8 [[E]], [[E]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%e = extractelement <2 x i64> %x, i32 1
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call void @use_i64(i64 %e)
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%r = add i64 %e, %e
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ret i64 %r
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%e = extractelement <16 x i8> %x, i32 0
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call void @use_i8(i8 %e)
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%r = add i8 %e, %e
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ret i8 %r
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}
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define i64 @ext1_ext1_add_uses1(<2 x i64> %x, <2 x i64> %y) {
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define i8 @ext1_ext1_add_uses1(<16 x i8> %x, <16 x i8> %y) {
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; CHECK-LABEL: @ext1_ext1_add_uses1(
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; CHECK-NEXT: [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
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; CHECK-NEXT: call void @use_i64(i64 [[E0]])
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x i64> [[Y:%.*]], i32 1
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; CHECK-NEXT: [[R:%.*]] = add i64 [[E0]], [[E1]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK-NEXT: [[E0:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0
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; CHECK-NEXT: call void @use_i8(i8 [[E0]])
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; CHECK-NEXT: [[E1:%.*]] = extractelement <16 x i8> [[Y:%.*]], i32 0
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; CHECK-NEXT: [[R:%.*]] = add i8 [[E0]], [[E1]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%e0 = extractelement <2 x i64> %x, i32 1
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call void @use_i64(i64 %e0)
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%e1 = extractelement <2 x i64> %y, i32 1
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%r = add i64 %e0, %e1
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ret i64 %r
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%e0 = extractelement <16 x i8> %x, i32 0
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call void @use_i8(i8 %e0)
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%e1 = extractelement <16 x i8> %y, i32 0
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%r = add i8 %e0, %e1
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ret i8 %r
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}
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define i64 @ext1_ext1_add_uses2(<2 x i64> %x, <2 x i64> %y) {
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define i8 @ext1_ext1_add_uses2(<16 x i8> %x, <16 x i8> %y) {
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; CHECK-LABEL: @ext1_ext1_add_uses2(
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; CHECK-NEXT: [[E0:%.*]] = extractelement <2 x i64> [[X:%.*]], i32 1
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x i64> [[Y:%.*]], i32 1
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; CHECK-NEXT: call void @use_i64(i64 [[E1]])
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; CHECK-NEXT: [[R:%.*]] = add i64 [[E0]], [[E1]]
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; CHECK-NEXT: ret i64 [[R]]
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; CHECK-NEXT: [[E0:%.*]] = extractelement <16 x i8> [[X:%.*]], i32 0
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; CHECK-NEXT: [[E1:%.*]] = extractelement <16 x i8> [[Y:%.*]], i32 0
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; CHECK-NEXT: call void @use_i8(i8 [[E1]])
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; CHECK-NEXT: [[R:%.*]] = add i8 [[E0]], [[E1]]
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; CHECK-NEXT: ret i8 [[R]]
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;
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%e0 = extractelement <2 x i64> %x, i32 1
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%e1 = extractelement <2 x i64> %y, i32 1
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call void @use_i64(i64 %e1)
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%r = add i64 %e0, %e1
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ret i64 %r
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%e0 = extractelement <16 x i8> %x, i32 0
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%e1 = extractelement <16 x i8> %y, i32 0
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call void @use_i8(i8 %e1)
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%r = add i8 %e0, %e1
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ret i8 %r
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}
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define i8 @ext0_ext1_add(<16 x i8> %x, <16 x i8> %y) {
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