forked from OSchip/llvm-project
R600: Use range for and fix missing consts.
llvm-svn: 212897
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@ -47,7 +47,7 @@ using namespace llvm;
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// precision, and leaves single precision to flush all and does not report
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// CL_FP_DENORM for CL_DEVICE_SINGLE_FP_CONFIG. Mesa's OpenCL currently reports
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// CL_FP_DENORM for both.
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static uint32_t getFPMode(MachineFunction &) {
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static uint32_t getFPMode(const MachineFunction &) {
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return FP_ROUND_MODE_SP(FP_ROUND_ROUND_TO_NEAREST) |
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FP_ROUND_MODE_DP(FP_ROUND_ROUND_TO_NEAREST) |
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FP_DENORM_MODE_SP(FP_DENORM_FLUSH_NONE) |
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@ -144,25 +144,21 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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return false;
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}
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void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
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void AMDGPUAsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
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unsigned MaxGPR = 0;
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bool killPixel = false;
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const R600RegisterInfo * RI =
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static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
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R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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const R600RegisterInfo *RI
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= static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
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const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
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const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
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for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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BB != BB_E; ++BB) {
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MachineBasicBlock &MBB = *BB;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E; ++I) {
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MachineInstr &MI = *I;
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for (const MachineBasicBlock &MBB : MF) {
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for (const MachineInstr &MI : MBB) {
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if (MI.getOpcode() == AMDGPU::KILLGT)
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killPixel = true;
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unsigned numOperands = MI.getNumOperands();
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for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
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MachineOperand & MO = MI.getOperand(op_idx);
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const MachineOperand &MO = MI.getOperand(op_idx);
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if (!MO.isReg())
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continue;
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unsigned HWReg = RI->getEncodingValue(MO.getReg()) & 0xff;
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@ -209,27 +205,22 @@ void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
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}
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void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
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MachineFunction &MF) const {
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const MachineFunction &MF) const {
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uint64_t CodeSize = 0;
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unsigned MaxSGPR = 0;
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unsigned MaxVGPR = 0;
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bool VCCUsed = false;
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const SIRegisterInfo * RI =
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static_cast<const SIRegisterInfo*>(TM.getRegisterInfo());
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for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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BB != BB_E; ++BB) {
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MachineBasicBlock &MBB = *BB;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
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I != E; ++I) {
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MachineInstr &MI = *I;
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const SIRegisterInfo *RI
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= static_cast<const SIRegisterInfo*>(TM.getRegisterInfo());
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for (const MachineBasicBlock &MBB : MF) {
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for (const MachineInstr &MI : MBB) {
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// TODO: CodeSize should account for multiple functions.
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CodeSize += MI.getDesc().Size;
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unsigned numOperands = MI.getNumOperands();
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for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
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MachineOperand &MO = MI.getOperand(op_idx);
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const MachineOperand &MO = MI.getOperand(op_idx);
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unsigned width = 0;
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bool isSGPR = false;
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@ -317,10 +308,10 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
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ProgInfo.CodeLen = CodeSize;
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}
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void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
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void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo) {
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const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
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SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
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unsigned RsrcReg;
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switch (MFI->getShaderType()) {
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@ -49,15 +49,15 @@ private:
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uint64_t CodeLen;
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};
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void getSIProgramInfo(SIProgramInfo &Out, MachineFunction &MF) const;
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void findNumUsedRegistersSI(MachineFunction &MF,
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void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF) const;
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void findNumUsedRegistersSI(const MachineFunction &MF,
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unsigned &NumSGPR,
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unsigned &NumVGPR) const;
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/// \brief Emit register usage information so that the GPU driver
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/// can correctly setup the GPU state.
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void EmitProgramInfoR600(MachineFunction &MF);
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void EmitProgramInfoSI(MachineFunction &MF, const SIProgramInfo &KernelInfo);
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void EmitProgramInfoR600(const MachineFunction &MF);
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void EmitProgramInfoSI(const MachineFunction &MF, const SIProgramInfo &KernelInfo);
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public:
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explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
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