forked from OSchip/llvm-project
Add support for computing "zext of value" in KnownBits. NFCI
Summary: The description of KnownBits::zext() and KnownBits::zextOrTrunc() has confusingly been telling that the operation is equivalent to zero extending the value we're tracking. That has not been true, instead the user has been forced to explicitly set the extended bits as known zero afterwards. This patch adds a second argument to KnownBits::zext() and KnownBits::zextOrTrunc() to control if the extended bits should be considered as known zero or as unknown. Reviewers: craig.topper, RKSimon Reviewed By: RKSimon Subscribers: javed.absar, hiraditya, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58650 llvm-svn: 355099
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@ -113,10 +113,16 @@ public:
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return KnownBits(Zero.trunc(BitWidth), One.trunc(BitWidth));
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}
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/// Zero extends the underlying known Zero and One bits. This is equivalent
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/// to zero extending the value we're tracking.
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KnownBits zext(unsigned BitWidth) {
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return KnownBits(Zero.zext(BitWidth), One.zext(BitWidth));
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/// Extends the underlying known Zero and One bits.
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/// By setting ExtendedBitsAreKnownZero=true this will be equivalent to
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/// zero extending the value we're tracking.
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/// With ExtendedBitsAreKnownZero=false the extended bits are set to unknown.
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KnownBits zext(unsigned BitWidth, bool ExtendedBitsAreKnownZero) {
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unsigned OldBitWidth = getBitWidth();
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APInt NewZero = Zero.zext(BitWidth);
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if (ExtendedBitsAreKnownZero)
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NewZero.setBitsFrom(OldBitWidth);
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return KnownBits(NewZero, One.zext(BitWidth));
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}
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/// Sign extends the underlying known Zero and One bits. This is equivalent
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@ -125,9 +131,13 @@ public:
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return KnownBits(Zero.sext(BitWidth), One.sext(BitWidth));
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}
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/// Zero extends or truncates the underlying known Zero and One bits. This is
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/// equivalent to zero extending or truncating the value we're tracking.
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KnownBits zextOrTrunc(unsigned BitWidth) {
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/// Extends or truncates the underlying known Zero and One bits. When
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/// extending the extended bits can either be set as known zero (if
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/// ExtendedBitsAreKnownZero=true) or as unknown (if
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/// ExtendedBitsAreKnownZero=false).
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KnownBits zextOrTrunc(unsigned BitWidth, bool ExtendedBitsAreKnownZero) {
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if (BitWidth > getBitWidth())
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return zext(BitWidth, ExtendedBitsAreKnownZero);
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return KnownBits(Zero.zextOrTrunc(BitWidth), One.zextOrTrunc(BitWidth));
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}
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@ -1128,12 +1128,9 @@ static void computeKnownBitsFromOperator(const Operator *I, KnownBits &Known,
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Q.DL.getTypeSizeInBits(ScalarTy);
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assert(SrcBitWidth && "SrcBitWidth can't be zero");
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Known = Known.zextOrTrunc(SrcBitWidth);
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Known = Known.zextOrTrunc(SrcBitWidth, false);
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computeKnownBits(I->getOperand(0), Known, Depth + 1, Q);
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Known = Known.zextOrTrunc(BitWidth);
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// Any top bits are known to be zero.
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if (BitWidth > SrcBitWidth)
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Known.Zero.setBitsFrom(SrcBitWidth);
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Known = Known.zextOrTrunc(BitWidth, true /* ExtendedBitsAreKnownZero */);
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break;
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}
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case Instruction::BitCast: {
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@ -400,7 +400,7 @@ FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
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if (BitWidth > LOI->Known.getBitWidth()) {
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LOI->NumSignBits = 1;
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LOI->Known = LOI->Known.zextOrTrunc(BitWidth);
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LOI->Known = LOI->Known.zext(BitWidth, false /* => any extend */);
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}
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return LOI;
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@ -2800,15 +2800,12 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
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EVT InVT = Op.getOperand(0).getValueType();
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APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
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Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
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Known = Known.zext(BitWidth);
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Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
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Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
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break;
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}
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case ISD::ZERO_EXTEND: {
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EVT InVT = Op.getOperand(0).getValueType();
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Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
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Known = Known.zext(BitWidth);
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Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
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Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
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break;
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}
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case ISD::SIGN_EXTEND_VECTOR_INREG: {
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@ -2829,7 +2826,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
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}
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case ISD::ANY_EXTEND: {
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Known = computeKnownBits(Op.getOperand(0), Depth+1);
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Known = Known.zext(BitWidth);
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Known = Known.zext(BitWidth, false /* ExtendedBitsAreKnownZero */);
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break;
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}
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case ISD::TRUNCATE: {
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@ -3026,7 +3023,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
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Known = computeKnownBits(InVec, Depth + 1);
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}
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if (BitWidth > EltBitWidth)
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Known = Known.zext(BitWidth);
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Known = Known.zext(BitWidth, false /* => any extend */);
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break;
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}
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case ISD::INSERT_VECTOR_ELT: {
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@ -1163,8 +1163,8 @@ bool TargetLowering::SimplifyDemandedBits(
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if (SimplifyDemandedBits(Src, InDemandedBits, Known, TLO, Depth + 1))
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return true;
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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Known = Known.zext(BitWidth);
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Known.Zero.setBitsFrom(InBits);
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assert(Known.getBitWidth() == InBits && "Src width has changed?");
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Known = Known.zext(BitWidth, true /* ExtendedBitsAreKnownZero */);
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break;
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}
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case ISD::SIGN_EXTEND: {
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@ -1217,7 +1217,7 @@ bool TargetLowering::SimplifyDemandedBits(
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if (SimplifyDemandedBits(Src, InDemandedBits, Known, TLO, Depth + 1))
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return true;
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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Known = Known.zext(BitWidth);
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Known = Known.zext(BitWidth, false /* => any extend */);
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break;
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}
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case ISD::TRUNCATE: {
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@ -1312,7 +1312,7 @@ bool TargetLowering::SimplifyDemandedBits(
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Known = Known2;
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if (BitWidth > EltBitWidth)
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Known = Known.zext(BitWidth);
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Known = Known.zext(BitWidth, false /* => any extend */);
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break;
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}
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case ISD::BITCAST: {
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@ -13706,8 +13706,7 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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if (Op.getOpcode() == ARMISD::VGETLANEs)
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Known = Known.sext(DstSz);
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else {
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Known = Known.zext(DstSz);
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Known.Zero.setBitsFrom(SrcSz);
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Known = Known.zext(DstSz, true /* extended bits are known zero */);
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}
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assert(DstSz == Known.getBitWidth());
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break;
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@ -6053,12 +6053,10 @@ SystemZTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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case Intrinsic::s390_vuplhw:
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case Intrinsic::s390_vuplf: {
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SDValue SrcOp = Op.getOperand(1);
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unsigned SrcBitWidth = SrcOp.getScalarValueSizeInBits();
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APInt SrcDemE = getDemandedSrcElements(Op, DemandedElts, 0);
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Known = DAG.computeKnownBits(SrcOp, SrcDemE, Depth + 1);
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if (IsLogical) {
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Known = Known.zext(BitWidth);
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Known.Zero.setBitsFrom(SrcBitWidth);
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Known = Known.zext(BitWidth, true);
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} else
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Known = Known.sext(BitWidth);
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break;
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@ -6087,7 +6085,7 @@ SystemZTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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// Known has the width of the source operand(s). Adjust if needed to match
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// the passed bitwidth.
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if (Known.getBitWidth() != BitWidth)
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Known = Known.zextOrTrunc(BitWidth);
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Known = Known.zextOrTrunc(BitWidth, false);
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}
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static unsigned computeNumSignBitsBinOp(SDValue Op, const APInt &DemandedElts,
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@ -30412,7 +30412,7 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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APInt DemandedElt = APInt::getOneBitSet(SrcVT.getVectorNumElements(),
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Op.getConstantOperandVal(1));
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Known = DAG.computeKnownBits(Src, DemandedElt, Depth + 1);
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Known = Known.zextOrTrunc(BitWidth);
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Known = Known.zextOrTrunc(BitWidth, false);
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Known.Zero.setBitsFrom(SrcVT.getScalarSizeInBits());
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break;
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}
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@ -365,10 +365,9 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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KnownBits InputKnown(SrcBitWidth);
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if (SimplifyDemandedBits(I, 0, InputDemandedMask, InputKnown, Depth + 1))
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return I;
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Known = InputKnown.zextOrTrunc(BitWidth);
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// Any top bits are known to be zero.
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if (BitWidth > SrcBitWidth)
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Known.Zero.setBitsFrom(SrcBitWidth);
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assert(InputKnown.getBitWidth() == SrcBitWidth && "Src width changed?");
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Known = InputKnown.zextOrTrunc(BitWidth,
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true /* ExtendedBitsAreKnownZero */);
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assert(!Known.hasConflict() && "Bits known to be one AND zero?");
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break;
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}
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